1 /*
2  * Copyright (C) 2000 RidgeRun, Inc.
3  * Author: RidgeRun, Inc.
4  *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
5  *
6  * Copyright 2001 MontaVista Software Inc.
7  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
8  * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
9  *
10  *  This program is free software; you can redistribute  it and/or modify it
11  *  under  the terms of  the GNU General  Public License as published by the
12  *  Free Software Foundation;  either version 2 of the  License, or (at your
13  *  option) any later version.
14  *
15  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
16  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
17  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
18  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
19  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
21  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
23  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  *  You should have received a copy of the  GNU General Public License along
27  *  with this program; if not, write  to the Free Software Foundation, Inc.,
28  *  675 Mass Ave, Cambridge, MA 02139, USA.
29  *
30  */
31 #include <linux/config.h>
32 #include <linux/errno.h>
33 #include <linux/init.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/module.h>
36 #include <linux/signal.h>
37 #include <linux/sched.h>
38 #include <linux/types.h>
39 #include <linux/interrupt.h>
40 #include <linux/ioport.h>
41 #include <linux/timex.h>
42 #include <linux/slab.h>
43 #include <linux/random.h>
44 #include <asm/bitops.h>
45 #include <asm/bootinfo.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/mipsregs.h>
49 #include <asm/system.h>
50 
51 
52 static spinlock_t rm7000_irq_lock = SPIN_LOCK_UNLOCKED;
53 
54 /* Function for careful CP0 interrupt mask access */
modify_cp0_intmask(unsigned clr_mask_in,unsigned set_mask_in)55 static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in)
56 {
57 	unsigned long status;
58 	unsigned clr_mask;
59 	unsigned set_mask;
60 
61 	/* do the low 8 bits first */
62 	clr_mask = 0xff & clr_mask_in;
63 	set_mask = 0xff & set_mask_in;
64 	status = read_c0_status();
65 	status &= ~((clr_mask & 0xFF) << 8);
66 	status |= (set_mask & 0xFF) << 8;
67 	write_c0_status(status);
68 
69 	/* do the high 8 bits */
70 	clr_mask = 0xff & (clr_mask_in >> 8);
71 	set_mask = 0xff & (set_mask_in >> 8);
72 	status = read_c0_intcontrol();
73 	status &= ~((clr_mask & 0xFF) << 8);
74 	status |= (set_mask & 0xFF) << 8;
75 	write_c0_intcontrol(status);
76 }
77 
mask_irq(unsigned int irq)78 static inline void mask_irq(unsigned int irq)
79 {
80 	modify_cp0_intmask(irq, 0);
81 }
82 
unmask_irq(unsigned int irq)83 static inline void unmask_irq(unsigned int irq)
84 {
85 	modify_cp0_intmask(0, irq);
86 }
87 
enable_cp7000_irq(unsigned int irq)88 static void enable_cp7000_irq(unsigned int irq)
89 {
90 	unsigned long flags;
91 
92 	spin_lock_irqsave(&rm7000_irq_lock, flags);
93 	unmask_irq(1 << irq);
94 	spin_unlock_irqrestore(&rm7000_irq_lock, flags);
95 }
96 
startup_cp7000_irq(unsigned int irq)97 static unsigned int startup_cp7000_irq(unsigned int irq)
98 {
99 	enable_cp7000_irq(irq);
100 
101 	return 0;				/* never anything pending */
102 }
103 
disable_cp7000_irq(unsigned int irq)104 static void disable_cp7000_irq(unsigned int irq)
105 {
106 	unsigned long flags;
107 
108 	spin_lock_irqsave(&rm7000_irq_lock, flags);
109 	mask_irq(1 << irq);
110 	spin_unlock_irqrestore(&rm7000_irq_lock, flags);
111 }
112 
113 #define shutdown_cp7000_irq disable_cp7000_irq
114 
mask_and_ack_cp7000_irq(unsigned int irq)115 static void mask_and_ack_cp7000_irq(unsigned int irq)
116 {
117 	mask_irq(1 << irq);
118 }
119 
end_cp7000_irq(unsigned int irq)120 static void end_cp7000_irq(unsigned int irq)
121 {
122 	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
123 		unmask_irq(1 << irq);
124 }
125 
126 static struct hw_interrupt_type cp7000_hpcdma_irq_type = {
127 	"CP7000",
128 	startup_cp7000_irq,
129 	shutdown_cp7000_irq,
130 	enable_cp7000_irq,
131 	disable_cp7000_irq,
132 	mask_and_ack_cp7000_irq,
133 	end_cp7000_irq,
134 	NULL
135 };
136 
137 
138 extern asmlinkage void ocelot_handle_int(void);
139 
init_IRQ(void)140 void __init init_IRQ(void)
141 {
142 	int i;
143 
144 	/*
145 	 * Clear all of the interrupts while we change the able around a bit.
146 	 */
147 	clear_c0_status(ST0_IM);
148 	__cli();
149 
150 	/* Sets the first-level interrupt dispatcher. */
151 	set_except_vector(0, ocelot_handle_int);
152 	init_generic_irq();
153 
154 	for (i = 0; i <= 15; i++) {
155 		irq_desc[i].status	= IRQ_DISABLED;
156 		irq_desc[i].action	= 0;
157 		irq_desc[i].depth	= 1;
158 		irq_desc[i].handler	= &cp7000_hpcdma_irq_type;
159 	}
160 
161 #ifdef CONFIG_KGDB
162 	printk("start kgdb ...\n");
163 	set_debug_traps();
164 	breakpoint();	/* you may move this line to whereever you want :-) */
165 #endif
166 #ifdef CONFIG_GDB_CONSOLE
167 	register_gdb_console();
168 #endif
169 }
170