1 /*
2 * BRIEF MODULE DESCRIPTION
3 * Code to handle irqs on GT64120A boards
4 * Derived from mips/orion and Cort <cort@fsmlabs.com>
5 *
6 * Copyright (C) 2000 RidgeRun, Inc.
7 * Author: RidgeRun, Inc.
8 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30 #include <linux/errno.h>
31 #include <linux/init.h>
32 #include <linux/kernel_stat.h>
33 #include <linux/module.h>
34 #include <linux/signal.h>
35 #include <linux/sched.h>
36 #include <linux/types.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/timex.h>
40 #include <linux/slab.h>
41 #include <linux/random.h>
42 #include <asm/bitops.h>
43 #include <asm/bootinfo.h>
44 #include <asm/io.h>
45 #include <asm/mipsregs.h>
46 #include <asm/system.h>
47 #include <asm/gt64120/gt64120.h>
48
pci_intA(struct pt_regs * regs)49 asmlinkage inline void pci_intA(struct pt_regs *regs)
50 {
51 do_IRQ(GT_INTA, regs);
52 }
53
pci_intD(struct pt_regs * regs)54 asmlinkage inline void pci_intD(struct pt_regs *regs)
55 {
56 do_IRQ(GT_INTD, regs);
57 }
58
disable_ev64120_irq(unsigned int irq_nr)59 static void disable_ev64120_irq(unsigned int irq_nr)
60 {
61 unsigned long flags;
62
63 local_irq_save(flags);
64 if (irq_nr >= 8) { // All PCI interrupts are on line 5 or 2
65 clear_c0_status(9 << 10);
66 } else {
67 clear_c0_status(1 << (irq_nr + 8));
68 }
69 local_irq_restore(flags);
70 }
71
enable_ev64120_irq(unsigned int irq_nr)72 static void enable_ev64120_irq(unsigned int irq_nr)
73 {
74 unsigned long flags;
75
76 local_irq_save(flags);
77 if (irq_nr >= 8) // All PCI interrupts are on line 5 or 2
78 set_c0_status(9 << 10);
79 else
80 set_c0_status(1 << (irq_nr + 8));
81 local_irq_restore(flags);
82 }
83
startup_ev64120_irq(unsigned int irq)84 static unsigned int startup_ev64120_irq(unsigned int irq)
85 {
86 enable_ev64120_irq(irq);
87 return 0; /* Never anything pending */
88 }
89
90 #define shutdown_ev64120_irq disable_ev64120_irq
91 #define mask_and_ack_ev64120_irq disable_ev64120_irq
92
end_ev64120_irq(unsigned int irq)93 static void end_ev64120_irq(unsigned int irq)
94 {
95 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
96 enable_ev64120_irq(irq);
97 }
98
99 static struct hw_interrupt_type ev64120_irq_type = {
100 .typename = "EV64120",
101 .startup = startup_ev64120_irq,
102 .shutdown = shutdown_ev64120_irq,
103 .enable = enable_ev64120_irq,
104 .disable = disable_ev64120_irq,
105 .ack = mask_and_ack_ev64120_irq,
106 .end = end_ev64120_irq,
107 .set_affinity = NULL
108 };
109
gt64120_irq_setup(void)110 void gt64120_irq_setup(void)
111 {
112 extern asmlinkage void galileo_handle_int(void);
113
114 /*
115 * Clear all of the interrupts while we change the able around a bit.
116 */
117 clear_c0_status(ST0_IM);
118
119 /* Sets the exception_handler array. */
120 set_except_vector(0, galileo_handle_int);
121
122 cli();
123
124 /*
125 * Enable timer. Other interrupts will be enabled as they are
126 * registered.
127 */
128 set_c0_status(IE_IRQ2);
129 }
130
init_IRQ(void)131 void __init init_IRQ(void)
132 {
133 int i;
134
135 /* Let's initialize our IRQ descriptors */
136 for (i = 0; i < NR_IRQS; i++) {
137 irq_desc[i].status = 0;
138 irq_desc[i].handler = &no_irq_type;
139 irq_desc[i].action = NULL;
140 irq_desc[i].depth = 0;
141 irq_desc[i].lock = SPIN_LOCK_UNLOCKED;
142 }
143
144 gt64120_irq_setup();
145 }
146