1 /*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * Galileo Technology chip interrupt handler
8 */
9 #include <linux/interrupt.h>
10 #include <linux/kernel.h>
11 #include <linux/config.h>
12 #include <linux/sched.h>
13 #include <linux/kernel_stat.h>
14 #include <asm/ptrace.h>
15 #include <asm/gt64120/gt64120.h>
16
17 /*
18 * These are interrupt handlers for the GT on-chip interrupts. They all come
19 * in to the MIPS on a single interrupt line, and have to be handled and ack'ed
20 * differently than other MIPS interrupts.
21 */
22
gt64120_irq(int irq,void * dev_id,struct pt_regs * regs)23 static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs)
24 {
25 unsigned int irq_src, int_high_src, irq_src_mask, int_high_src_mask;
26 int handled = 0;
27
28 irq_src = GT_READ(GT_INTRCAUSE_OFS);
29 irq_src_mask = GT_READ(GT_INTRMASK_OFS);
30 int_high_src = GT_READ(GT_HINTRCAUSE_OFS);
31 int_high_src_mask = GT_READ(GT_HINTRMASK_OFS);
32 irq_src = irq_src & irq_src_mask;
33 int_high_src = int_high_src & int_high_src_mask;
34
35 if (irq_src & 0x00000800) { /* Check for timer interrupt */
36 handled = 1;
37 irq_src &= ~0x00000800;
38 do_timer(regs);
39 }
40
41 GT_WRITE(GT_INTRCAUSE_OFS, 0);
42 GT_WRITE(GT_HINTRCAUSE_OFS, 0);
43 }
44
45 /*
46 * Initializes timer using galileo's built in timer.
47 */
48 #ifdef CONFIG_SYSCLK_100
49 #define Sys_clock (100 * 1000000) // 100 MHz
50 #endif
51 #ifdef CONFIG_SYSCLK_83
52 #define Sys_clock (83.333 * 1000000) // 83.333 MHz
53 #endif
54 #ifdef CONFIG_SYSCLK_75
55 #define Sys_clock (75 * 1000000) // 75 MHz
56 #endif
57
58 /*
59 * This will ignore the standard MIPS timer interrupt handler that is passed in
60 * as *irq (=irq0 in ../kernel/time.c). We will do our own timer interrupt
61 * handling.
62 */
gt64120_time_init(void)63 void gt64120_time_init(void)
64 {
65 extern irq_desc_t irq_desc[NR_IRQS];
66 static struct irqaction timer;
67
68 /* Disable timer first */
69 GT_WRITE(GT_TC_CONTROL_OFS, 0);
70 /* Load timer value for 100 Hz */
71 GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
72
73 /*
74 * Create the IRQ structure entry for the timer. Since we're too early
75 * in the boot process to use the "request_irq()" call, we'll hard-code
76 * the values to the correct interrupt line.
77 */
78 timer.handler = gt64120_irq;
79 timer.flags = SA_SHIRQ | SA_INTERRUPT;
80 timer.name = "timer";
81 timer.dev_id = NULL;
82 timer.next = NULL;
83 timer.mask = 0;
84 irq_desc[GT_TIMER].action = &timer;
85
86 enable_irq(GT_TIMER);
87
88 /* Enable timer ints */
89 GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
90 /* clear Cause register first */
91 GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
92 /* Unmask timer int */
93 GT_WRITE(GT_INTRMASK_OFS, 0x800);
94 /* Clear High int register */
95 GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
96 /* Mask All interrupts at High cause interrupt */
97 GT_WRITE(GT_HINTRMASK_OFS, 0x0);
98 }
99