1Memory management for CRIS/MMU
2------------------------------
3HISTORY:
4
5$Log: README.mm,v $
6Revision 1.1  2000/07/10 16:25:21  bjornw
7Initial revision
8
9Revision 1.4  2000/01/17 02:31:59  bjornw
10Added discussion of paging and VM.
11
12Revision 1.3  1999/12/03 16:43:23  hp
13Blurb about that the 3.5G-limitation is not a MMU limitation
14
15Revision 1.2  1999/12/03 16:04:21  hp
16Picky comment about not mapping the first page
17
18Revision 1.1  1999/12/03 15:41:30  bjornw
19First version of CRIS/MMU memory layout specification.
20
21
22
23
24
25------------------------------
26
27See the ETRAX-NG HSDD for reference.
28
29We use the page-size of 8 kbytes, as opposed to the i386 page-size of 4 kbytes.
30
31The MMU can, apart from the normal mapping of pages, also do a top-level
32segmentation of the kernel memory space. We use this feature to avoid having
33to use page-tables to map the physical memory into the kernel's address
34space. We also use it to keep the user-mode virtual mapping in the same
35map during kernel-mode, so that the kernel easily can access the corresponding
36user-mode process' data.
37
38As a comparision, the Linux/i386 2.0 puts the kernel and physical RAM at
39address 0, overlapping with the user-mode virtual space, so that descriptor
40registers are needed for each memory access to specify which MMU space to
41map through. That changed in 2.2, putting the kernel/physical RAM at
420xc0000000, to co-exist with the user-mode mapping. We will do something
43quite similar, but with the additional complexity of having to map the
44internal chip I/O registers and the flash memory area (including SRAM
45and peripherial chip-selets).
46
47The kernel-mode segmentation map:
48
49        ------------------------                ------------------------
50FFFFFFFF|                      | => cached      |                      |
51        |    kernel seg_f      |    flash       |                      |
52F0000000|______________________|                |                      |
53EFFFFFFF|                      | => uncached    |                      |
54        |    kernel seg_e      |    flash       |                      |
55E0000000|______________________|                |        DRAM          |
56DFFFFFFF|                      |  paged to any  |      Un-cached       |
57        |    kernel seg_d      |    =======>    |                      |
58D0000000|______________________|                |                      |
59CFFFFFFF|                      |                |                      |
60        |    kernel seg_c      |==\             |                      |
61C0000000|______________________|   \            |______________________|
62BFFFFFFF|                      |  uncached      |                      |
63        |    kernel seg_b      |=====\=========>|       Registers      |
64B0000000|______________________|      \c        |______________________|
65AFFFFFFF|                      |       \a       |                      |
66        |                      |        \c      | FLASH/SRAM/Peripheral|
67        |                      |         \h     |______________________|
68        |                      |          \e    |                      |
69        |                      |           \d   |                      |
70        | kernel seg_0 - seg_a |            \==>|         DRAM         |
71        |                      |                |        Cached        |
72        |                      |  paged to any  |                      |
73        |                      |    =======>    |______________________|
74        |                      |                |                      |
75        |                      |                |        Illegal       |
76        |                      |                |______________________|
77        |                      |                |                      |
78        |                      |                | FLASH/SRAM/Peripheral|
7900000000|______________________|                |______________________|
80
81In user-mode it looks the same except that only the space 0-AFFFFFFF is
82available. Therefore, in this model, the virtual address space per process
83is limited to 0xb0000000 bytes (minus 8192 bytes, since the first page,
840..8191, is never mapped, in order to trap NULL references).
85
86It also means that the total physical RAM that can be mapped is 256 MB
87(kseg_c above). More RAM can be mapped by choosing a different segmentation
88and shrinking the user-mode memory space.
89
90The MMU can map all 4 GB in user mode, but doing that would mean that a
91few extra instructions would be needed for each access to user mode
92memory.
93
94The kernel needs access to both cached and uncached flash. Uncached is
95necessary because of the special write/erase sequences. Also, the
96peripherial chip-selects are decoded from that region.
97
98The kernel also needs its own virtual memory space. That is kseg_d. It
99is used by the vmalloc() kernel function to allocate virtual contiguous
100chunks of memory not possible using the normal kmalloc physical RAM
101allocator.
102
103The setting of the actual MMU control registers to use this layout would
104be something like this:
105
106R_MMU_KSEG = ( ( seg_f, seg     ) |   // Flash cached
107               ( seg_e, seg     ) |   // Flash uncached
108               ( seg_d, page    ) |   // kernel vmalloc area
109               ( seg_c, seg     ) |   // kernel linear segment
110               ( seg_b, seg     ) |   // kernel linear segment
111               ( seg_a, page    ) |
112               ( seg_9, page    ) |
113               ( seg_8, page    ) |
114               ( seg_7, page    ) |
115               ( seg_6, page    ) |
116               ( seg_5, page    ) |
117               ( seg_4, page    ) |
118               ( seg_3, page    ) |
119               ( seg_2, page    ) |
120               ( seg_1, page    ) |
121               ( seg_0, page    ) );
122
123R_MMU_KBASE_HI = ( ( base_f, 0x0 ) |   // flash/sram/periph cached
124                   ( base_e, 0x8 ) |   // flash/sram/periph uncached
125                   ( base_d, 0x0 ) |   // don't care
126                   ( base_c, 0x4 ) |   // physical RAM cached area
127                   ( base_b, 0xb ) |   // uncached on-chip registers
128                   ( base_a, 0x0 ) |   // don't care
129                   ( base_9, 0x0 ) |   // don't care
130                   ( base_8, 0x0 ) );  // don't care
131
132R_MMU_KBASE_LO = ( ( base_7, 0x0 ) |   // don't care
133                   ( base_6, 0x0 ) |   // don't care
134                   ( base_5, 0x0 ) |   // don't care
135                   ( base_4, 0x0 ) |   // don't care
136                   ( base_3, 0x0 ) |   // don't care
137                   ( base_2, 0x0 ) |   // don't care
138                   ( base_1, 0x0 ) |   // don't care
139                   ( base_0, 0x0 ) );  // don't care
140
141NOTE: while setting up the MMU, we run in a non-mapped mode in the DRAM (0x40
142segment) and need to setup the seg_4 to a unity mapping, so that we don't get
143a fault before we have had time to jump into the real kernel segment (0xc0). This
144is done in head.S temporarily, but fixed by the kernel later in paging_init.
145
146
147Paging - PTE's, PMD's and PGD's
148-------------------------------
149
150[ References: asm/pgtable.h, asm/page.h, asm/mmu.h ]
151
152The paging mechanism uses virtual addresses to split a process memory-space into
153pages, a page being the smallest unit that can be freely remapped in memory. On
154Linux/CRIS, a page is 8192 bytes (for technical reasons not equal to 4096 as in
155most other 32-bit architectures). It would be inefficient to let a virtual memory
156mapping be controlled by a long table of page mappings, so it is broken down into
157a 2-level structure with a Page Directory containing pointers to Page Tables which
158each have maps of up to 2048 pages (8192 / sizeof(void *)). Linux can actually
159handle 3-level structures as well, with a Page Middle Directory in between, but
160in many cases, this is folded into a two-level structure by excluding the Middle
161Directory.
162
163We'll take a look at how an address is translated while we discuss how it's handled
164in the Linux kernel.
165
166The example address is 0xd004000c; in binary this is:
167
16831       23       15       7      0
16911010000 00000100 00000000 00001100
170
171|______| |__________||____________|
172  PGD        PTE       page offset
173
174Given the top-level Page Directory, the offset in that directory is calculated
175using the upper 8 bits:
176
177extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
178{
179	return mm->pgd + (address >> PGDIR_SHIFT);
180}
181
182PGDIR_SHIFT is the log2 of the amount of memory an entry in the PGD can map; in our
183case it is 24, corresponding to 16 MB. This means that each entry in the PGD
184corresponds to 16 MB of virtual memory.
185
186The pgd_t from our example will therefore be the 208'th (0xd0) entry in mm->pgd.
187
188Since the Middle Directory does not exist, it is a unity mapping:
189
190extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
191{
192	return (pmd_t *) dir;
193}
194
195The Page Table provides the final lookup by using bits 13 to 23 as index:
196
197extern inline pte_t * pte_offset(pmd_t * dir, unsigned long address)
198{
199	return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) &
200					   (PTRS_PER_PTE - 1));
201}
202
203PAGE_SHIFT is the log2 of the size of a page; 13 in our case. PTRS_PER_PTE is
204the number of pointers that fit in a Page Table and is used to mask off the
205PGD-part of the address.
206
207The so-far unused bits 0 to 12 are used to index inside a page linearily.
208
209The VM system
210-------------
211
212The kernels own page-directory is the swapper_pg_dir, cleared in paging_init,
213and contains the kernels virtual mappings (the kernel itself is not paged - it
214is mapped linearily using kseg_c as described above). Architectures without
215kernel segments like the i386, need to setup swapper_pg_dir directly in head.S
216to map the kernel itself. swapper_pg_dir is pointed to by init_mm.pgd as the
217init-task's PGD.
218
219To see what support functions are used to setup a page-table, let's look at the
220kernel's internal paged memory system, vmalloc/vfree.
221
222void * vmalloc(unsigned long size)
223
224The vmalloc-system keeps a paged segment in kernel-space at 0xd0000000. What
225happens first is that a virtual address chunk is allocated to the request using
226get_vm_area(size). After that, physical RAM pages are allocated and put into
227the kernel's page-table using alloc_area_pages(addr, size).
228
229static int alloc_area_pages(unsigned long address, unsigned long size)
230
231First the PGD entry is found using init_mm.pgd. This is passed to
232alloc_area_pmd (remember the 3->2 folding). It uses pte_alloc_kernel to
233check if the PGD entry points anywhere - if not, a page table page is
234allocated and the PGD entry updated. Then the alloc_area_pte function is
235used just like alloc_area_pmd to check which page table entry is desired,
236and a physical page is allocated and the table entry updated. All of this
237is repeated at the top-level until the entire address range specified has
238been mapped.
239
240
241
242