1 /*
2 * linux/arch/arm/mach-omaha/core.c
3 *
4 * Copyright (C) ARM Limited 2002.
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21 #include <linux/config.h>
22 #include <linux/types.h>
23 #include <linux/sched.h>
24 #include <linux/mm.h>
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/timer.h>
28 #include <linux/init.h>
29
30 #include <asm/hardware.h>
31 #include <asm/io.h>
32 #include <asm/irq.h>
33 #include <asm/pgtable.h>
34 #include <asm/page.h>
35 #include <asm/setup.h>
36 #include <asm/mach-types.h>
37
38 #include <asm/mach/arch.h>
39 #include <asm/mach/irq.h>
40 #include <asm/mach/map.h>
41
42 extern void omaha_map_io(void);
43
44 /*
45 * All IO addresses are mapped onto VA 0xExxx.xxxx, where x.xxxx
46 * is the (PA + 0xE0000000).
47 *
48 * Setup a VA for the Omaha interrupt controller.
49 */
50
51 #define VA_IC_BASE IO_ADDRESS(PLAT_PERIPHERAL_BASE)
52
sc_mask_and_ack_irq(unsigned int irq)53 static void sc_mask_and_ack_irq(unsigned int irq)
54 {
55 unsigned int tmp;
56
57 // Mask this interrupt
58 tmp = __raw_readl(VA_IC_BASE + OMAHA_INTMSK);
59 tmp = tmp | (1 << irq);
60 __raw_writel(tmp, VA_IC_BASE + OMAHA_INTMSK);
61
62 // Clear the source pending register
63 tmp = __raw_readl(VA_IC_BASE + OMAHA_SRCPND);
64 tmp = tmp | (1 << irq);
65 __raw_writel(tmp, VA_IC_BASE + OMAHA_SRCPND);
66
67 // Clear the interrupt pending register
68 tmp = __raw_readl(VA_IC_BASE + OMAHA_INTPND);
69 tmp = tmp | (1 << irq);
70 __raw_writel(tmp, VA_IC_BASE + OMAHA_INTPND);
71
72 }
73
sc_mask_irq(unsigned int irq)74 static void sc_mask_irq(unsigned int irq)
75 {
76 unsigned int tmp;
77
78 // Mask this interrupt
79 tmp = __raw_readl(VA_IC_BASE + OMAHA_INTMSK);
80 tmp = tmp | (1 << irq);
81 __raw_writel(tmp, VA_IC_BASE + OMAHA_INTMSK);
82 }
83
sc_unmask_irq(unsigned int irq)84 static void sc_unmask_irq(unsigned int irq)
85 {
86 unsigned int tmp;
87
88 tmp = __raw_readl(VA_IC_BASE + OMAHA_INTMSK);
89 tmp = tmp & ~(1 << irq);
90 __raw_writel(tmp, VA_IC_BASE + OMAHA_INTMSK);
91 }
92
omaha_init_irq(void)93 static void __init omaha_init_irq(void)
94 {
95 unsigned int i;
96
97 /* bootloader disables interrupt hardware,
98 * so we just set up linux data structures...
99 */
100
101 for (i = 0; i < NR_IRQS; i++) {
102 irq_desc[i].valid = 1;
103 irq_desc[i].probe_ok = 1;
104 irq_desc[i].mask_ack = sc_mask_and_ack_irq;
105 irq_desc[i].mask = sc_mask_irq;
106 irq_desc[i].unmask = sc_unmask_irq;
107 }
108 }
109
110 /* Notes
111 *
112 * IO space has been mapped into the top of virtual memory at 0xExxx xxxx
113 * See IO_ACCESS macro for details.
114 */
115
116 /* Logical Physical
117 * Start 0xE0000000 0x00000000
118 * End 0xFAFFFFFC 0x1AFFFFFC
119 */
120
121 /* Map the bottom 2Gb of IO space into the top of memory, but leave
122 * space for the high vector table.
123 */
124 static struct map_desc omaha_io_desc[] __initdata = {
125 { IO_ADDRESS(0x00000000), 0x00000000, 0x1B000000, DOMAIN_IO, 0, 1 },
126 LAST_DESC
127 };
128
omaha_map_io(void)129 static void __init omaha_map_io(void)
130 {
131