1 /*
2 * linux/arch/arm/mach-integrator/mm.c
3 *
4 * Extra MM routines for the ARM Integrator board
5 *
6 * Copyright (C) 1999,2000 Arm Limited
7 * Copyright (C) 2000 Deep Blue Solutions Ltd
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23 #include <linux/sched.h>
24 #include <linux/mm.h>
25 #include <linux/init.h>
26
27 #include <asm/hardware.h>
28 #include <asm/io.h>
29 #include <asm/pgtable.h>
30 #include <asm/page.h>
31
32 #include <asm/mach/map.h>
33
34 /*
35 * Logical Physical
36 * e8000000 40000000 PCI memory
37 * ec000000 62000000 PCI config space
38 * ed000000 61000000 PCI V3 regs
39 * ee000000 60000000 PCI IO
40 * ef000000 Cache flush
41 * f1000000 10000000 Core module registers
42 * f1100000 11000000 System controller registers
43 * f1200000 12000000 EBI registers
44 * f1300000 13000000 Counter/Timer
45 * f1400000 14000000 Interrupt controller
46 * f1500000 15000000 RTC
47 * f1600000 16000000 UART 0
48 * f1700000 17000000 UART 1
49 * f1800000 18000000 Keyboard
50 * f1900000 19000000 Mouse
51 * f1a00000 1a000000 Debug LEDs
52 * f1b00000 1b000000 GPIO
53 */
54
55 static struct map_desc integrator_io_desc[] __initdata = {
56 { IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K , DOMAIN_IO, 0, 1},
57 { IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K , DOMAIN_IO, 0, 1},
58 { IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K , DOMAIN_IO, 0, 1},
59 { IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K , DOMAIN_IO, 0, 1},
60 { IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K , DOMAIN_IO, 0, 1},
61 { IO_ADDRESS(INTEGRATOR_RTC_BASE), INTEGRATOR_RTC_BASE, SZ_4K , DOMAIN_IO, 0, 1},
62 { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K , DOMAIN_IO, 0, 1},
63 { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K , DOMAIN_IO, 0, 1},
64 { IO_ADDRESS(INTEGRATOR_KBD_BASE), INTEGRATOR_KBD_BASE, SZ_4K , DOMAIN_IO, 0, 1},
65 { IO_ADDRESS(INTEGRATOR_MOUSE_BASE), INTEGRATOR_MOUSE_BASE, SZ_4K , DOMAIN_IO, 0, 1},
66 { IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K , DOMAIN_IO, 0, 1},
67 { IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K , DOMAIN_IO, 0, 1},
68 { PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M , DOMAIN_IO, 0, 1},
69 { PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M , DOMAIN_IO, 0, 1},
70 { PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_512K , DOMAIN_IO, 0, 1},
71 { PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K , DOMAIN_IO, 0, 1},
72 LAST_DESC
73 };
74
integrator_map_io(void)75 void __init integrator_map_io(void)
76 {
77 iotable_init(integrator_io_desc);
78 }
79