1 /* 2 * linux/arch/alpha/kernel/machvec.h 3 * 4 * Copyright (C) 1997, 1998 Richard Henderson 5 * 6 * This file has goodies to help simplify instantiation of machine vectors. 7 */ 8 9 #include <linux/config.h> 10 #include <asm/pgalloc.h> 11 12 /* Whee. These systems don't have an HAE: 13 IRONGATE, MARVEL, POLARIS, TSUNAMI, TITAN, WILDFIRE 14 Fix things up for the GENERIC kernel by defining the HAE address 15 to be that of the cache. Now we can read and write it as we like. ;-) */ 16 #define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache) 17 #define MARVEL_HAE_ADDRESS (&alpha_mv.hae_cache) 18 #define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache) 19 #define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache) 20 #define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache) 21 #define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache) 22 23 #if CIA_ONE_HAE_WINDOW 24 #define CIA_HAE_ADDRESS (&alpha_mv.hae_cache) 25 #endif 26 #if MCPCIA_ONE_HAE_WINDOW 27 #define MCPCIA_HAE_ADDRESS (&alpha_mv.hae_cache) 28 #endif 29 30 /* Only a few systems don't define IACK_SC, handling all interrupts through 31 the SRM console. But splitting out that one case from IO() below 32 seems like such a pain. Define this to get things to compile. */ 33 #define JENSEN_IACK_SC 1 34 #define T2_IACK_SC 1 35 #define WILDFIRE_IACK_SC 1 /* FIXME */ 36 37 /* 38 * Some helpful macros for filling in the blanks. 39 */ 40 41 #define CAT1(x,y) x##y 42 #define CAT(x,y) CAT1(x,y) 43 44 #define DO_DEFAULT_RTC rtc_port: 0x70 45 46 #define DO_EV4_MMU \ 47 max_asn: EV4_MAX_ASN, \ 48 mv_switch_mm: ev4_switch_mm, \ 49 mv_activate_mm: ev4_activate_mm, \ 50 mv_flush_tlb_current: ev4_flush_tlb_current, \ 51 mv_flush_tlb_current_page: ev4_flush_tlb_current_page 52 53 #define DO_EV5_MMU \ 54 max_asn: EV5_MAX_ASN, \ 55 mv_switch_mm: ev5_switch_mm, \ 56 mv_activate_mm: ev5_activate_mm, \ 57 mv_flush_tlb_current: ev5_flush_tlb_current, \ 58 mv_flush_tlb_current_page: ev5_flush_tlb_current_page 59 60 #define DO_EV6_MMU \ 61 max_asn: EV6_MAX_ASN, \ 62 mv_switch_mm: ev5_switch_mm, \ 63 mv_activate_mm: ev5_activate_mm, \ 64 mv_flush_tlb_current: ev5_flush_tlb_current, \ 65 mv_flush_tlb_current_page: ev5_flush_tlb_current_page 66 67 #define DO_EV7_MMU \ 68 max_asn: EV6_MAX_ASN, \ 69 mv_switch_mm: ev5_switch_mm, \ 70 mv_activate_mm: ev5_activate_mm, \ 71 mv_flush_tlb_current: ev5_flush_tlb_current, \ 72 mv_flush_tlb_current_page: ev5_flush_tlb_current_page 73 74 #define IO_LITE(UP,low) \ 75 hae_register: (unsigned long *) CAT(UP,_HAE_ADDRESS), \ 76 iack_sc: CAT(UP,_IACK_SC), \ 77 mv_inb: CAT(low,_inb), \ 78 mv_inw: CAT(low,_inw), \ 79 mv_inl: CAT(low,_inl), \ 80 mv_outb: CAT(low,_outb), \ 81 mv_outw: CAT(low,_outw), \ 82 mv_outl: CAT(low,_outl), \ 83 mv_readb: CAT(low,_readb), \ 84 mv_readw: CAT(low,_readw), \ 85 mv_readl: CAT(low,_readl), \ 86 mv_readq: CAT(low,_readq), \ 87 mv_writeb: CAT(low,_writeb), \ 88 mv_writew: CAT(low,_writew), \ 89 mv_writel: CAT(low,_writel), \ 90 mv_writeq: CAT(low,_writeq), \ 91 mv_ioremap: CAT(low,_ioremap), \ 92 mv_iounmap: CAT(low,_iounmap) \ 93 94 #define IO(UP,low) \ 95 IO_LITE(UP,low), \ 96 pci_ops: &CAT(low,_pci_ops) 97 98 #define DO_APECS_IO IO(APECS,apecs) 99 #define DO_CIA_IO IO(CIA,cia) 100 #define DO_IRONGATE_IO IO(IRONGATE,irongate) 101 #define DO_LCA_IO IO(LCA,lca) 102 #define DO_MARVEL_IO IO(MARVEL,marvel) 103 #define DO_MCPCIA_IO IO(MCPCIA,mcpcia) 104 #define DO_POLARIS_IO IO(POLARIS,polaris) 105 #define DO_T2_IO IO(T2,t2) 106 #define DO_TSUNAMI_IO IO(TSUNAMI,tsunami) 107 #define DO_TITAN_IO IO(TITAN,titan) 108 #define DO_WILDFIRE_IO IO(WILDFIRE,wildfire) 109 110 #define DO_PYXIS_IO IO_LITE(CIA,cia_bwx), \ 111 pci_ops: &CAT(cia,_pci_ops) 112 113 #define BUS(which) \ 114 mv_is_ioaddr: CAT(which,_is_ioaddr), \ 115 mv_pci_tbi: CAT(which,_pci_tbi) 116 117 #define DO_APECS_BUS BUS(apecs) 118 #define DO_CIA_BUS BUS(cia) 119 #define DO_IRONGATE_BUS BUS(irongate) 120 #define DO_LCA_BUS BUS(lca) 121 #define DO_MARVEL_BUS BUS(marvel) 122 #define DO_MCPCIA_BUS BUS(mcpcia) 123 #define DO_POLARIS_BUS BUS(polaris) 124 #define DO_T2_BUS BUS(t2) 125 #define DO_TSUNAMI_BUS BUS(tsunami) 126 #define DO_TITAN_BUS BUS(titan) 127 #define DO_WILDFIRE_BUS BUS(wildfire) 128 129 /* 130 * In a GENERIC kernel, we have lots of these vectors floating about, 131 * all but one of which we want to go away. In a non-GENERIC kernel, 132 * we want only one, ever. 133 * 134 * Accomplish this in the GENERIC kernel by putting all of the vectors 135 * in the .init.data section where they'll go away. We'll copy the 136 * one we want to the real alpha_mv vector in setup_arch. 137 * 138 * Accomplish this in a non-GENERIC kernel by ifdef'ing out all but 139 * one of the vectors, which will not reside in .init.data. We then 140 * alias this one vector to alpha_mv, so no copy is needed. 141 * 142 * Upshot: set __initdata to nothing for non-GENERIC kernels. 143 */ 144 145 #ifdef CONFIG_ALPHA_GENERIC 146 #define __initmv __initdata 147 #define ALIAS_MV(x) 148 #else 149 #define __initmv 150 151 /* GCC actually has a syntax for defining aliases, but is under some 152 delusion that you shouldn't be able to declare it extern somewhere 153 else beforehand. Fine. We'll do it ourselves. */ 154 #if 0 155 #define ALIAS_MV(system) \ 156 struct alpha_machine_vector alpha_mv __attribute__((alias(#system "_mv"))); 157 #else 158 #define ALIAS_MV(system) \ 159 asm(".global alpha_mv\nalpha_mv = " #system "_mv"); 160 #endif 161 #endif /* GENERIC */ 162