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Searched refs:rptr (Results 1 – 25 of 106) sorted by relevance

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/linux-6.1.9/drivers/media/platform/amphion/
Dvpu_rpc.c42 ptr2 = desc->rptr; in vpu_rpc_check_buffer_space()
44 ptr1 = desc->rptr; in vpu_rpc_check_buffer_space()
114 msgword = *(u32 *)(shared->msg_mem_vir + desc->rptr - desc->start); in vpu_rpc_check_msg()
128 u32 rptr; in vpu_rpc_receive_msg_buf() local
135 data = (u32 *)(shared->msg_mem_vir + desc->rptr - desc->start); in vpu_rpc_receive_msg_buf()
136 rptr = desc->rptr; in vpu_rpc_receive_msg_buf()
139 rptr += 4; in vpu_rpc_receive_msg_buf()
140 if (rptr >= desc->end) { in vpu_rpc_receive_msg_buf()
141 rptr = desc->start; in vpu_rpc_receive_msg_buf()
155 rptr += 4; in vpu_rpc_receive_msg_buf()
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Dvpu_helpers.c201 u32 *rptr, u32 size, void *dst) in vpu_helper_copy_from_stream_buffer() argument
208 if (!stream_buffer || !rptr || !dst) in vpu_helper_copy_from_stream_buffer()
214 offset = *rptr; in vpu_helper_copy_from_stream_buffer()
229 *rptr = vpu_helper_step_walk(stream_buffer, offset, size); in vpu_helper_copy_from_stream_buffer()
311 if (desc.rptr > desc.wptr) in vpu_helper_get_free_space()
312 return desc.rptr - desc.wptr; in vpu_helper_get_free_space()
313 else if (desc.rptr < desc.wptr) in vpu_helper_get_free_space()
314 return (desc.end - desc.start + desc.rptr - desc.wptr); in vpu_helper_get_free_space()
326 if (desc.wptr > desc.rptr) in vpu_helper_get_used_space()
327 return desc.wptr - desc.rptr; in vpu_helper_get_used_space()
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Dvpu_dbg.c267 iface->cmd_desc->rptr); in vpu_dbg_core()
275 iface->msg_desc->rptr); in vpu_dbg_core()
287 u32 rptr; in vpu_dbg_fwlog() local
295 rptr = print_buf->read; in vpu_dbg_fwlog()
298 if (rptr == wptr) in vpu_dbg_fwlog()
300 else if (rptr < wptr) in vpu_dbg_fwlog()
301 length = wptr - rptr; in vpu_dbg_fwlog()
303 length = print_buf->bytes + wptr - rptr; in vpu_dbg_fwlog()
310 if (rptr + length >= print_buf->bytes) { in vpu_dbg_fwlog()
311 int num = print_buf->bytes - rptr; in vpu_dbg_fwlog()
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/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ih.c52 ih->rptr = 0; in amdgpu_ih_ring_init()
161 if (wptr != READ_ONCE(ih->rptr)) { in amdgpu_ih_ring_write()
192 ih->rptr == amdgpu_ih_get_wptr(adev, ih), timeout); in amdgpu_ih_wait_on_checkpoint_process_ts()
216 DRM_DEBUG("%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr); in amdgpu_ih_process()
221 while (ih->rptr != wptr && --count) { in amdgpu_ih_process()
223 ih->rptr &= ih->ptr_mask; in amdgpu_ih_process()
231 if (wptr != ih->rptr) in amdgpu_ih_process()
253 u32 ring_index = ih->rptr >> 2; in amdgpu_ih_decode_iv_helper()
280 ih->rptr += 32; in amdgpu_ih_decode_iv_helper()
283 uint64_t amdgpu_ih_decode_iv_ts_helper(struct amdgpu_ih_ring *ih, u32 rptr, in amdgpu_ih_decode_iv_ts_helper() argument
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Damdgpu_ih.h66 unsigned rptr; member
84 uint64_t (*decode_iv_ts)(struct amdgpu_ih_ring *ih, u32 rptr,
92 #define amdgpu_ih_decode_iv_ts(adev, ih, rptr, offset) \ argument
94 (adev)->irq.ih_funcs->decode_iv_ts((ih), (rptr), (offset)))
108 uint64_t amdgpu_ih_decode_iv_ts_helper(struct amdgpu_ih_ring *ih, u32 rptr,
Dtonga_ih.c88 adev->irq.ih.rptr = 0; in tonga_ih_disable_interrupts()
216 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in tonga_ih_get_wptr()
217 ih->rptr = (wptr + 16) & ih->ptr_mask; in tonga_ih_get_wptr()
241 u32 ring_index = ih->rptr >> 2; in tonga_ih_decode_iv()
257 ih->rptr += 16; in tonga_ih_decode_iv()
273 *ih->rptr_cpu = ih->rptr; in tonga_ih_set_rptr()
274 WDOORBELL32(ih->doorbell_index, ih->rptr); in tonga_ih_set_rptr()
276 WREG32(mmIH_RB_RPTR, ih->rptr); in tonga_ih_set_rptr()
Dcik_ih.c92 adev->irq.ih.rptr = 0; in cik_ih_disable_interrupts()
202 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in cik_ih_get_wptr()
203 ih->rptr = (wptr + 16) & ih->ptr_mask; in cik_ih_get_wptr()
247 u32 ring_index = ih->rptr >> 2; in cik_ih_decode_iv()
263 ih->rptr += 16; in cik_ih_decode_iv()
277 WREG32(mmIH_RB_RPTR, ih->rptr); in cik_ih_set_rptr()
Dsi_ih.c59 adev->irq.ih.rptr = 0; in si_ih_disable_interrupts()
117 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in si_ih_get_wptr()
118 ih->rptr = (wptr + 16) & ih->ptr_mask; in si_ih_get_wptr()
130 u32 ring_index = ih->rptr >> 2; in si_ih_decode_iv()
144 ih->rptr += 16; in si_ih_decode_iv()
150 WREG32(IH_RB_RPTR, ih->rptr); in si_ih_set_rptr()
Dcz_ih.c92 adev->irq.ih.rptr = 0; in cz_ih_disable_interrupts()
213 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in cz_ih_get_wptr()
214 ih->rptr = (wptr + 16) & ih->ptr_mask; in cz_ih_get_wptr()
239 u32 ring_index = ih->rptr >> 2; in cz_ih_decode_iv()
255 ih->rptr += 16; in cz_ih_decode_iv()
269 WREG32(mmIH_RB_RPTR, ih->rptr); in cz_ih_set_rptr()
Diceland_ih.c92 adev->irq.ih.rptr = 0; in iceland_ih_disable_interrupts()
212 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in iceland_ih_get_wptr()
213 ih->rptr = (wptr + 16) & ih->ptr_mask; in iceland_ih_get_wptr()
238 u32 ring_index = ih->rptr >> 2; in iceland_ih_decode_iv()
254 ih->rptr += 16; in iceland_ih_decode_iv()
268 WREG32(mmIH_RB_RPTR, ih->rptr); in iceland_ih_set_rptr()
Dvega10_ih.c127 ih->rptr = 0; in vega10_ih_toggle_ring_interrupts()
369 wptr, ih->rptr, tmp); in vega10_ih_get_wptr()
370 ih->rptr = tmp; in vega10_ih_get_wptr()
398 if ((v < ih->ring_size) && (v != ih->rptr)) in vega10_ih_irq_rearm()
399 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega10_ih_irq_rearm()
423 *ih->rptr_cpu = ih->rptr; in vega10_ih_set_rptr()
424 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega10_ih_set_rptr()
430 WREG32(ih_regs->ih_rb_rptr, ih->rptr); in vega10_ih_set_rptr()
Dvega20_ih.c131 ih->rptr = 0; in vega20_ih_toggle_ring_interrupts()
420 wptr, ih->rptr, tmp); in vega20_ih_get_wptr()
421 ih->rptr = tmp; in vega20_ih_get_wptr()
450 if ((v < ih->ring_size) && (v != ih->rptr)) in vega20_ih_irq_rearm()
451 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega20_ih_irq_rearm()
475 *ih->rptr_cpu = ih->rptr; in vega20_ih_set_rptr()
476 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega20_ih_set_rptr()
482 WREG32(ih_regs->ih_rb_rptr, ih->rptr); in vega20_ih_set_rptr()
Dih_v6_0.c156 ih->rptr = 0; in ih_v6_0_toggle_ring_interrupts()
414 wptr, ih->rptr, tmp); in ih_v6_0_get_wptr()
415 ih->rptr = tmp; in ih_v6_0_get_wptr()
442 if ((v < ih->ring_size) && (v != ih->rptr)) in ih_v6_0_irq_rearm()
443 WDOORBELL32(ih->doorbell_index, ih->rptr); in ih_v6_0_irq_rearm()
463 *ih->rptr_cpu = ih->rptr; in ih_v6_0_set_rptr()
464 WDOORBELL32(ih->doorbell_index, ih->rptr); in ih_v6_0_set_rptr()
470 WREG32(ih_regs->ih_rb_rptr, ih->rptr); in ih_v6_0_set_rptr()
Dnavi10_ih.c182 ih->rptr = 0; in navi10_ih_toggle_ring_interrupts()
439 wptr, ih->rptr, tmp); in navi10_ih_get_wptr()
440 ih->rptr = tmp; in navi10_ih_get_wptr()
468 if ((v < ih->ring_size) && (v != ih->rptr)) in navi10_ih_irq_rearm()
469 WDOORBELL32(ih->doorbell_index, ih->rptr); in navi10_ih_irq_rearm()
493 *ih->rptr_cpu = ih->rptr; in navi10_ih_set_rptr()
494 WDOORBELL32(ih->doorbell_index, ih->rptr); in navi10_ih_set_rptr()
500 WREG32(ih_regs->ih_rb_rptr, ih->rptr); in navi10_ih_set_rptr()
/linux-6.1.9/sound/pci/riptide/
Driptide.c799 union cmdret rptr = CMDRET_ZERO; in writearm() local
803 SEND_RMEM(cif, 0x02, addr, &rptr); in writearm()
804 rptr.retlongs[0] &= (~mask); in writearm()
808 SEND_WMEM(cif, 0x02, (rptr.retlongs[0] | data)); in writearm()
809 SEND_RMEM(cif, 0x02, addr, &rptr); in writearm()
810 if ((rptr.retlongs[0] & data) == data) { in writearm()
814 rptr.retlongs[0] &= ~mask; in writearm()
925 union cmdret rptr = CMDRET_ZERO; in setmixer() local
931 SEND_RDGV(cif, num, num, &rptr); in setmixer()
932 if (rptr.retwords[0] == lval && rptr.retwords[1] == rval) in setmixer()
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/linux-6.1.9/drivers/gpu/drm/radeon/
Dradeon_ring.c83 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_free_size() local
86 ring->ring_free_dw = rptr + (ring->ring_size / 4); in radeon_ring_free_size()
254 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_test_lockup() local
258 if (rptr != atomic_read(&ring->last_rptr)) { in radeon_ring_test_lockup()
470 uint32_t rptr, wptr, rptr_next; in radeon_debugfs_ring_info_show() local
480 rptr = radeon_ring_get_rptr(rdev, ring); in radeon_debugfs_ring_info_show()
482 rptr, rptr); in radeon_debugfs_ring_info_show()
506 i = (rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; in radeon_debugfs_ring_info_show()
509 if (rptr == i) in radeon_debugfs_ring_info_show()
/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/inc/
Ddmub_cmd.h3406 uint32_t rptr; /**< Read pointer for consumer in bytes */ member
3423 return (rb->wrpt == rb->rptr); in dmub_rb_empty()
3437 if (rb->wrpt >= rb->rptr) in dmub_rb_full()
3438 data_count = rb->wrpt - rb->rptr; in dmub_rb_full()
3440 data_count = rb->capacity - (rb->rptr - rb->wrpt); in dmub_rb_full()
3513 uint8_t *rb_cmd = (uint8_t *)(rb->base_address) + rb->rptr; in dmub_rb_front()
3534 *next_rptr = rb->rptr + DMUB_RB_CMD_SIZE * num_cmds; in dmub_rb_get_rptr_with_offset()
3551 uint32_t rptr) in dmub_rb_peek_offset() argument
3553 uint8_t *rb_cmd = (uint8_t *)(rb->base_address) + rptr; in dmub_rb_peek_offset()
3574 …nst uint64_t volatile *src = (const uint64_t volatile *)((uint8_t *)(rb->base_address) + rb->rptr); in dmub_rb_out_front()
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/linux-6.1.9/drivers/net/ethernet/tehuti/
Dtehuti.c170 f->rptr = 0; in bdx_fifo_init()
1210 size = f->m.wptr - f->m.rptr; in bdx_rx_receive()
1216 rxdd = (struct rxd_desc *)(f->m.va + f->m.rptr); in bdx_rx_receive()
1231 f->m.rptr += tmp_len; in bdx_rx_receive()
1233 tmp_len = f->m.rptr - f->m.memsz; in bdx_rx_receive()
1235 f->m.rptr = tmp_len; in bdx_rx_receive()
1238 f->m.rptr, tmp_len); in bdx_rx_receive()
1291 WRITE_REG(priv, f->m.reg_RPTR, f->m.rptr & TXF_WPTR_WR_PTR); in bdx_rx_receive()
1370 BDX_ASSERT(*pptr != db->rptr && /* expect either read */ in __bdx_tx_db_ptr_next()
1387 BDX_ASSERT(db->rptr == db->wptr); /* can't read from empty db */ in bdx_tx_db_inc_rptr()
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/linux-6.1.9/drivers/video/fbdev/
Dmaxinefb.c77 unsigned char *rptr; in maxinefb_ims332_read_register() local
80 rptr = regs + 0x80000 + (regno << 4); in maxinefb_ims332_read_register()
81 j = *((volatile unsigned short *) rptr); in maxinefb_ims332_read_register()
/linux-6.1.9/drivers/crypto/ccp/
Dtee-dev.c249 u32 rptr; in tee_submit_cmd() local
261 rptr = ioread32(tee->io_regs + tee->vdata->ring_rptr_reg); in tee_submit_cmd()
266 if (!(tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || in tee_submit_cmd()
271 rptr, tee->rb_mgr.wptr); in tee_submit_cmd()
281 (tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || in tee_submit_cmd()
284 rptr, tee->rb_mgr.wptr, cmd->flag); in tee_submit_cmd()
/linux-6.1.9/drivers/net/ppp/
Dppp_deflate.c46 static int z_compress(void *state, unsigned char *rptr,
185 static int z_compress(void *arg, unsigned char *rptr, unsigned char *obuf, in z_compress() argument
195 proto = PPP_PROTOCOL(rptr); in z_compress()
209 wptr[0] = PPP_ADDRESS(rptr); in z_compress()
210 wptr[1] = PPP_CONTROL(rptr); in z_compress()
221 rptr += off; in z_compress()
222 state->strm.next_in = rptr; in z_compress()
/linux-6.1.9/drivers/gpu/drm/qxl/
Dqxl_object.c210 void *rptr; in qxl_bo_kmap_atomic_page() local
226 rptr = bo->kptr + (page_offset * PAGE_SIZE); in qxl_bo_kmap_atomic_page()
227 return rptr; in qxl_bo_kmap_atomic_page()
233 rptr = bo_map.vaddr; /* TODO: Use mapping abstraction properly */ in qxl_bo_kmap_atomic_page()
235 rptr += page_offset * PAGE_SIZE; in qxl_bo_kmap_atomic_page()
236 return rptr; in qxl_bo_kmap_atomic_page()
/linux-6.1.9/drivers/i2c/busses/
Di2c-cpm.c305 int rptr; in cpm_i2c_xfer() local
317 rptr = 0; in cpm_i2c_xfer()
329 dev_dbg(&adap->dev, "R: %d T: %d\n", rptr, tptr); in cpm_i2c_xfer()
331 cpm_i2c_parse_message(adap, pmsg, num, tptr, rptr); in cpm_i2c_xfer()
333 rptr++; in cpm_i2c_xfer()
346 rptr = 0; in cpm_i2c_xfer()
355 !(in_be16(&rbdf[rptr].cbd_sc) & BD_SC_EMPTY), in cpm_i2c_xfer()
368 ret = cpm_i2c_check_message(adap, pmsg, tptr, rptr); in cpm_i2c_xfer()
371 rptr++; in cpm_i2c_xfer()
/linux-6.1.9/drivers/gpu/drm/amd/amdkfd/
Dkfd_kernel_queue.c233 uint32_t wptr, rptr; in kq_acquire_packet_buffer() local
242 rptr = *kq->rptr_kernel; in kq_acquire_packet_buffer()
248 pr_debug("rptr: %d\n", rptr); in kq_acquire_packet_buffer()
252 available_size = (rptr + queue_size_dwords - 1 - wptr) % in kq_acquire_packet_buffer()
267 if (packet_size_in_dwords >= rptr) in kq_acquire_packet_buffer()
/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_srv.c682 flush_rb.rptr = dmub->inbox1_last_wptr; in dmub_srv_cmd_execute()
736 uint32_t i, rptr; in dmub_srv_wait_for_idle() local
742 rptr = dmub->hw_funcs.get_inbox1_rptr(dmub); in dmub_srv_wait_for_idle()
744 if (rptr > dmub->inbox1_rb.capacity) in dmub_srv_wait_for_idle()
747 dmub->inbox1_rb.rptr = rptr; in dmub_srv_wait_for_idle()
869 const uint64_t *src = (const uint64_t *)(rb->base_address) + rb->rptr / sizeof(uint64_t); in dmub_rb_out_trace_buffer_front()
874 if (rb->rptr == rb->wrpt) in dmub_rb_out_trace_buffer_front()
882 rb->rptr += sizeof(struct dmcub_trace_buf_entry); in dmub_rb_out_trace_buffer_front()
884 rb->rptr %= rb->capacity; in dmub_rb_out_trace_buffer_front()

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