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Searched refs:ETH_PLL_CTL1 (Results 1 – 1 of 1) sorted by relevance

/linux-6.1.9/drivers/net/mdio/
Dmdio-mux-meson-g12a.c28 #define ETH_PLL_CTL1 0x48 macro
133 writel(0x927e0000, pll->base + ETH_PLL_CTL1); in g12a_ephy_pll_init()