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Searched refs:BYTE0_CLK_SRC (Results 1 – 24 of 24) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dqcom,mmcc-msm8994.h26 #define BYTE0_CLK_SRC 16 macro
Dqcom,mmcc-msm8974.h42 #define BYTE0_CLK_SRC 33 macro
Dqcom,mmcc-sdm660.h10 #define BYTE0_CLK_SRC 1 macro
Dqcom,mmcc-apq8084.h47 #define BYTE0_CLK_SRC 38 macro
Dqcom,gcc-msm8916.h52 #define BYTE0_CLK_SRC 43 macro
Dqcom,gcc-msm8909.h37 #define BYTE0_CLK_SRC 25 macro
Dqcom,gcc-msm8939.h52 #define BYTE0_CLK_SRC 43 macro
Dqcom,mmcc-msm8998.h25 #define BYTE0_CLK_SRC 16 macro
Dqcom,gcc-msm8953.h30 #define BYTE0_CLK_SRC 23 macro
Dqcom,mmcc-msm8996.h42 #define BYTE0_CLK_SRC 33 macro
/linux-6.1.9/drivers/clk/qcom/
Dmmcc-msm8974.c2456 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
2578 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dgcc-msm8909.c2517 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dmmcc-msm8994.c2425 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dmmcc-apq8084.c3167 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dmmcc-sdm660.c2641 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dmmcc-msm8998.c2677 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dgcc-msm8916.c3185 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dmmcc-msm8996.c3368 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dgcc-msm8939.c3680 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
Dgcc-msm8953.c4143 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
/linux-6.1.9/arch/arm/boot/dts/
Dqcom-msm8974.dtsi1555 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
/linux-6.1.9/arch/arm64/boot/dts/qcom/
Dmsm8916.dtsi1031 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
Dsdm630.dtsi1594 assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
Dmsm8996.dtsi1012 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;