/linux-5.19.10/arch/powerpc/sysdev/xics/ |
D | ics-rtas.c | 28 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); in ics_rtas_unmask_irq() local 32 pr_devel("xics: unmask virq %d [hw 0x%x]\n", d->irq, hw_irq); in ics_rtas_unmask_irq() 34 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS) in ics_rtas_unmask_irq() 39 call_status = rtas_call_reentrant(ibm_set_xive, 3, 1, NULL, hw_irq, in ics_rtas_unmask_irq() 44 __func__, hw_irq, server, call_status); in ics_rtas_unmask_irq() 49 call_status = rtas_call_reentrant(ibm_int_on, 1, 1, NULL, hw_irq); in ics_rtas_unmask_irq() 52 __func__, hw_irq, call_status); in ics_rtas_unmask_irq() 64 static void ics_rtas_mask_real_irq(unsigned int hw_irq) in ics_rtas_mask_real_irq() argument 68 if (hw_irq == XICS_IPI) in ics_rtas_mask_real_irq() 71 call_status = rtas_call_reentrant(ibm_int_off, 1, 1, NULL, hw_irq); in ics_rtas_mask_real_irq() [all …]
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D | ics-opal.c | 43 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); in ics_opal_unmask_irq() local 47 pr_devel("ics-hal: unmask virq %d [hw 0x%x]\n", d->irq, hw_irq); in ics_opal_unmask_irq() 49 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS) in ics_opal_unmask_irq() 55 rc = opal_set_xive(hw_irq, server, DEFAULT_PRIORITY); in ics_opal_unmask_irq() 59 __func__, d->irq, hw_irq, server, rc); in ics_opal_unmask_irq() 68 static void ics_opal_mask_real_irq(unsigned int hw_irq) in ics_opal_mask_real_irq() argument 73 if (hw_irq == XICS_IPI) in ics_opal_mask_real_irq() 77 rc = opal_set_xive(hw_irq, server, 0xff); in ics_opal_mask_real_irq() 80 __func__, hw_irq, rc); in ics_opal_mask_real_irq() 85 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); in ics_opal_mask_irq() local [all …]
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D | ics-native.c | 134 static int ics_native_check(struct ics *ics, unsigned int hw_irq) in ics_native_check() argument 138 pr_devel("%s: hw_irq=0x%x\n", __func__, hw_irq); in ics_native_check() 140 if (hw_irq < in->ibase || hw_irq >= (in->ibase + in->icount)) in ics_native_check()
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D | icp-opal.c | 108 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); in icp_opal_eoi() local 112 rc = opal_int_eoi((xics_pop_cppr() << 24) | hw_irq); in icp_opal_eoi()
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D | icp-hv.c | 77 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); in icp_hv_eoi() local 80 icp_hv_set_xirr((xics_pop_cppr() << 24) | hw_irq); in icp_hv_eoi()
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D | icp-native.c | 89 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); in icp_native_eoi() local 92 icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq); in icp_native_eoi()
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/linux-5.19.10/drivers/irqchip/ |
D | irq-renesas-intc-irqpin.c | 55 int hw_irq; member 114 int reg, int hw_irq) in intc_irqpin_hwirq_mask() argument 116 return BIT((p->iomem[reg].width - 1) - hw_irq); in intc_irqpin_hwirq_mask() 120 int reg, int hw_irq) in intc_irqpin_irq_write_hwirq() argument 122 intc_irqpin_write(p, reg, intc_irqpin_hwirq_mask(p, reg, hw_irq)); in intc_irqpin_irq_write_hwirq() 175 str, i->requested_irq, i->hw_irq, i->domain_irq); in intc_irqpin_dbg() 181 int hw_irq = irqd_to_hwirq(d); in intc_irqpin_irq_enable() local 183 intc_irqpin_dbg(&p->irq[hw_irq], "enable"); in intc_irqpin_irq_enable() 184 intc_irqpin_irq_write_hwirq(p, INTC_IRQPIN_REG_CLEAR, hw_irq); in intc_irqpin_irq_enable() 190 int hw_irq = irqd_to_hwirq(d); in intc_irqpin_irq_disable() local [all …]
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D | irq-renesas-irqc.c | 40 int hw_irq; member 63 dev_dbg(i->p->dev, "%s (%d:%d)\n", str, i->requested_irq, i->hw_irq); in irqc_dbg() 77 int hw_irq = irqd_to_hwirq(d); in irqc_irq_set_type() local 81 irqc_dbg(&p->irq[hw_irq], "sense"); in irqc_irq_set_type() 86 tmp = ioread32(p->iomem + IRQC_CONFIG(hw_irq)); in irqc_irq_set_type() 89 iowrite32(tmp, p->iomem + IRQC_CONFIG(hw_irq)); in irqc_irq_set_type() 96 int hw_irq = irqd_to_hwirq(d); in irqc_irq_set_wake() local 98 irq_set_irq_wake(p->irq[hw_irq].requested_irq, on); in irqc_irq_set_wake() 111 u32 bit = BIT(i->hw_irq); in irqc_irq_handler() 118 generic_handle_domain_irq(p->irq_domain, i->hw_irq); in irqc_irq_handler() [all …]
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D | irq-renesas-rza1.c | 71 unsigned int hw_irq = irqd_to_hwirq(d); in rza1_irqc_set_type() local 96 tmp &= ~ICR1_IRQS_MASK(hw_irq); in rza1_irqc_set_type() 97 tmp |= ICR1_IRQS(hw_irq, sense); in rza1_irqc_set_type()
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D | irq-bcm7038-l1.c | 379 irq_hw_number_t hw_irq) in bcm7038_l1_map() argument 382 u32 mask = BIT(hw_irq % IRQS_PER_WORD); in bcm7038_l1_map() 383 u32 word = hw_irq / IRQS_PER_WORD; in bcm7038_l1_map()
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/linux-5.19.10/arch/powerpc/sysdev/xive/ |
D | xive-internal.h | 41 int (*populate_irq_data)(u32 hw_irq, struct xive_irq_data *data); 42 int (*configure_irq)(u32 hw_irq, u32 target, u8 prio, u32 sw_irq); 43 int (*get_irq_config)(u32 hw_irq, u32 *target, u8 *prio, 54 void (*sync_source)(u32 hw_irq); 55 u64 (*esb_rw)(u32 hw_irq, u32 offset, u64 data, bool write);
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D | common.c | 225 val = xive_ops->esb_rw(xd->hw_irq, offset, 0, 0); in xive_esb_read() 235 xive_ops->esb_rw(xd->hw_irq, offset, data, 1); in xive_esb_write() 291 static struct irq_data *xive_get_irq_data(u32 hw_irq) in xive_get_irq_data() argument 293 unsigned int irq = irq_find_mapping(xive_irq_domain, hw_irq); in xive_get_irq_data() 298 int xmon_xive_get_irq_config(u32 hw_irq, struct irq_data *d) in xmon_xive_get_irq_config() argument 305 rc = xive_ops->get_irq_config(hw_irq, &target, &prio, &lirq); in xmon_xive_get_irq_config() 307 xmon_printf("IRQ 0x%08x : no config rc=%d\n", hw_irq, rc); in xmon_xive_get_irq_config() 312 hw_irq, target, prio, lirq); in xmon_xive_get_irq_config() 315 d = xive_get_irq_data(hw_irq); in xmon_xive_get_irq_config() 474 pr_debug("%s: HW 0x%x %smask\n", __func__, xd->hw_irq, mask ? "" : "un"); in xive_do_source_set_mask() [all …]
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D | native.c | 46 int xive_native_populate_irq_data(u32 hw_irq, struct xive_irq_data *data) in xive_native_populate_irq_data() argument 55 rc = opal_xive_get_irq_info(hw_irq, &flags, &eoi_page, &trig_page, in xive_native_populate_irq_data() 59 hw_irq, rc); in xive_native_populate_irq_data() 77 pr_err("Failed to map EOI page for irq 0x%x\n", hw_irq); in xive_native_populate_irq_data() 81 data->hw_irq = hw_irq; in xive_native_populate_irq_data() 92 pr_err("Failed to map trigger page for irq 0x%x\n", hw_irq); in xive_native_populate_irq_data() 99 int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq) in xive_native_configure_irq() argument 104 rc = opal_xive_set_irq_config(hw_irq, target, prio, sw_irq); in xive_native_configure_irq() 113 static int xive_native_get_irq_config(u32 hw_irq, u32 *target, u8 *prio, in xive_native_get_irq_config() argument 120 rc = opal_xive_get_irq_config(hw_irq, &vp, prio, &lirq); in xive_native_get_irq_config() [all …]
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D | spapr.c | 387 static int xive_spapr_populate_irq_data(u32 hw_irq, struct xive_irq_data *data) in xive_spapr_populate_irq_data() argument 397 rc = plpar_int_get_source_info(0, hw_irq, &flags, &eoi_page, &trig_page, in xive_spapr_populate_irq_data() 412 data->hw_irq = hw_irq; in xive_spapr_populate_irq_data() 430 pr_err("Failed to map EOI page for irq 0x%x\n", hw_irq); in xive_spapr_populate_irq_data() 442 pr_err("Failed to map trigger page for irq 0x%x\n", hw_irq); in xive_spapr_populate_irq_data() 448 static int xive_spapr_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq) in xive_spapr_configure_irq() argument 452 rc = plpar_int_set_source_config(XIVE_SRC_SET_EISN, hw_irq, target, in xive_spapr_configure_irq() 458 static int xive_spapr_get_irq_config(u32 hw_irq, u32 *target, u8 *prio, in xive_spapr_get_irq_config() argument 466 rc = plpar_int_get_source_config(0, hw_irq, &h_target, &h_prio, in xive_spapr_get_irq_config() 659 static void xive_spapr_sync_source(u32 hw_irq) in xive_spapr_sync_source() argument [all …]
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/linux-5.19.10/arch/powerpc/include/asm/ |
D | xive.h | 47 u32 hw_irq; member 104 int xmon_xive_get_irq_config(u32 hw_irq, struct irq_data *d); 111 int xive_native_populate_irq_data(u32 hw_irq, 116 int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq); 122 void xive_native_sync_source(u32 hw_irq); 123 void xive_native_sync_queue(u32 hw_irq);
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/linux-5.19.10/drivers/misc/ocxl/ |
D | afu_irq.c | 12 int hw_irq; member 74 irq->virq = irq_create_mapping(NULL, irq->hw_irq); in setup_afu_irq() 79 pr_debug("hw_irq %d mapped to virq %u\n", irq->hw_irq, irq->virq); in setup_afu_irq() 128 rc = ocxl_link_irq_alloc(ctx->afu->fn->link, &irq->hw_irq); in ocxl_afu_irq_alloc() 136 trace_ocxl_afu_irq_alloc(ctx->pasid, irq->id, irq->virq, irq->hw_irq); in ocxl_afu_irq_alloc() 144 ocxl_link_free_irq(ctx->afu->fn->link, irq->hw_irq); in ocxl_afu_irq_alloc() 164 ocxl_link_free_irq(ctx->afu->fn->link, irq->hw_irq); in afu_irq_free()
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D | trace.h | 174 TP_PROTO(int pasid, int irq_id, unsigned int virq, int hw_irq), 175 TP_ARGS(pasid, irq_id, virq, hw_irq), 181 __field(int, hw_irq) 188 __entry->hw_irq = hw_irq; 195 __entry->hw_irq
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D | link.c | 753 int ocxl_link_irq_alloc(void *link_handle, int *hw_irq) in ocxl_link_irq_alloc() argument 767 *hw_irq = irq; in ocxl_link_irq_alloc() 772 void ocxl_link_free_irq(void *link_handle, int hw_irq) in ocxl_link_free_irq() argument 776 xive_native_free_irq(hw_irq); in ocxl_link_free_irq()
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/linux-5.19.10/kernel/irq/ |
D | generic-chip.c | 347 __irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq) in __irq_get_domain_generic_chip() argument 354 idx = hw_irq / dgc->irqs_per_chip; in __irq_get_domain_generic_chip() 366 irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq) in irq_get_domain_generic_chip() argument 368 struct irq_chip_generic *gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_get_domain_generic_chip() 385 irq_hw_number_t hw_irq) in irq_map_generic_chip() argument 395 gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_map_generic_chip() 399 idx = hw_irq % dgc->irqs_per_chip; in irq_map_generic_chip() 429 irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL); in irq_map_generic_chip() 438 unsigned int hw_irq = data->hwirq; in irq_unmap_generic_chip() local 442 gc = irq_get_domain_generic_chip(d, hw_irq); in irq_unmap_generic_chip() [all …]
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/linux-5.19.10/arch/powerpc/platforms/powernv/ |
D | opal-irqchip.c | 235 u32 hw_irq; in opal_event_init() local 239 i, &hw_irq); in opal_event_init() 246 virq = irq_create_mapping(NULL, hw_irq); in opal_event_init() 248 pr_warn("Failed to map OPAL irq 0x%x\n", hw_irq); in opal_event_init()
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/linux-5.19.10/drivers/pci/controller/ |
D | pci-xgene-msi.c | 292 int msir_index, msir_val, hw_irq, ret; in xgene_msi_isr() local 322 hw_irq = (((msir_index * IRQS_PER_IDX) + intr_index) * in xgene_msi_isr() 329 hw_irq = hwirq_to_canonical_hwirq(hw_irq); in xgene_msi_isr() 330 ret = generic_handle_domain_irq(xgene_msi->inner_domain, hw_irq); in xgene_msi_isr()
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/linux-5.19.10/Documentation/devicetree/bindings/interrupt-controller/ |
D | microchip,pic32-evic.txt | 23 <hw_irq irq_type> 25 hw_irq - represents the hardware interrupt number as in the data sheet.
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/linux-5.19.10/include/misc/ |
D | ocxl.h | 464 int ocxl_link_irq_alloc(void *link_handle, int *hw_irq); 469 void ocxl_link_free_irq(void *link_handle, int hw_irq);
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/linux-5.19.10/arch/um/include/asm/ |
D | Kbuild | 13 generic-y += hw_irq.h
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/linux-5.19.10/drivers/gpio/ |
D | gpio-davinci.c | 353 irq_hw_number_t hw_irq; in gpio_irq_handler() local 369 hw_irq = (bank_num / 2) * 32 + bit; in gpio_irq_handler() 371 generic_handle_domain_irq(d->irq_domain, hw_irq); in gpio_irq_handler()
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