Searched refs:SMU_DCEFCLK (Results 1 – 9 of 9) sorted by relevance
213 case SMU_DCEFCLK: in renoir_get_dpm_clk_limited()558 case SMU_DCEFCLK: in renoir_print_clk_levels()583 case SMU_DCEFCLK: in renoir_print_clk_levels()
255 SMU_DCEFCLK, enumerator
1063 SMU_DCEFCLK, in navi10_set_default_dpm_table()1277 case SMU_DCEFCLK: in navi10_emit_clk_levels()1486 case SMU_DCEFCLK: in navi10_print_clk_levels()1681 case SMU_DCEFCLK: in navi10_force_clk_levels()1792 case SMU_DCEFCLK: in navi10_get_clock_by_type_with_latency()
894 SMU_DCEFCLK); in smu_v11_0_init_max_sustainable_clocks()1091 clk_select = SMU_DCEFCLK; in smu_v11_0_display_clock_voltage_request()
1034 SMU_DCEFCLK, in sienna_cichlid_set_default_dpm_table()1263 case SMU_DCEFCLK: in sienna_cichlid_print_clk_levels()1433 case SMU_DCEFCLK: in sienna_cichlid_force_clk_levels()
1917 clk_type = SMU_DCEFCLK; break; in smu_force_ppclk_levels()2304 clk_type = SMU_DCEFCLK; break; in smu_convert_to_smuclk()2617 clk_type = SMU_DCEFCLK; in smu_get_clock_by_type_with_latency()
975 SMU_DCEFCLK); in smu_v13_0_init_max_sustainable_clocks()1117 clk_select = SMU_DCEFCLK; in smu_v13_0_display_clock_voltage_request()
1133 case SMU_DCEFCLK: in smu_v13_0_7_force_clk_levels()
1120 case SMU_DCEFCLK: in smu_v13_0_0_force_clk_levels()