Searched refs:VSYNC (Results 1 – 4 of 4) sorted by relevance
37 card delivers the VSYNC pulse of the SAA chip to GIRQ1, not73 frame, the VSYNC goes low, and GRAB is cleared. The interrupt74 routine starts to work since its VSYNC driven, and again75 activates the GRAB bit. A few ms later the VSYNC (re-)rises and
174 #define VSYNC 0x0224 macro
1415 sst_write(VSYNC, par->vSyncOff << 16 | par->vSyncOn); in sstfb_set_par()
239 upper:X - top boundary: lines between end of VSYNC pulse and start of first241 lower:X - bottom boundary: lines between end of picture and start of VSYNC243 vslen:X - length of VSYNC pulse, in lines. Default is derived from `vesa'253 sync:X - sync. pulse - bit 0 inverts HSYNC polarity, bit 1 VSYNC polarity.