Searched refs:TMU0_TCR (Results 1 – 2 of 2) sorted by relevance
55 #define TMU0_TCR 0xA412FE9C /* Word access */ macro68 #define TMU0_TCR 0xfffffe9c /* Word access */ macro82 #define TMU0_TCR 0xffd80010 /* Word access */ macro133 if(ctrl_inw(TMU0_TCR) & 0x100) { /* Check UNF bit */ in do_gettimeoffset()271 timer_status = ctrl_inw(TMU0_TCR); in timer_interrupt()273 ctrl_outw(timer_status, TMU0_TCR); in timer_interrupt()301 ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR); in get_timer_frequency()554 ctrl_outw(TMU0_TCR_INIT, TMU0_TCR); in time_init()
79 #define TMU0_TCR TMU0_BASE+0x8 /* Word access */ macro341 timer_status = ctrl_inw(TMU0_TCR); in timer_interrupt()343 ctrl_outw(timer_status, TMU0_TCR); in timer_interrupt()553 ctrl_outw(TMU0_TCR_INIT, TMU0_TCR); in time_init()