| /DragonOS/kernel/src/exception/ |
| H A D | handle.rs | 63 let chip = irq_desc.irq_data().chip_info_read_irqsave().chip(); in handle()
68 chip.irq_eoi(din.irq_data()); in handle()
84 mask_irq(desc_inner.irq_data()); in handle()
108 mask_ack_irq(desc_inner_guard.irq_data()); in handle()
117 mask_ack_irq(desc_inner_guard.irq_data()); in handle()
121 let irq_data = desc_inner_guard.irq_data().clone(); in handle() localVariable
123 irq_data.chip_info_read_irqsave().chip().irq_ack(&irq_data); in handle()
127 debug!("no action for irq {}", irq_data.irq().data()); in handle()
128 irq_manager().mask_irq(&irq_data); in handle()
174 pub(super) fn mask_ack_irq(irq_data: &Arc<IrqData>) { in mask_ack_irq()
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| H A D | irqdomain.rs | 183 let irq_data = irq_desc_manager() in domain_associate() localVariable
189 .irq_data(); in domain_associate()
190 if irq_data.domain().is_some() { in domain_associate()
194 irq_data.domain().unwrap().name() in domain_associate()
199 let mut irq_data_guard = irq_data.inner(); in domain_associate()
209 let mut irq_data_guard = irq_data.inner(); in domain_associate()
217 let chip = irq_data.chip_info_read_irqsave().chip(); in domain_associate()
221 self.irq_domain_set_mapping(domain, hwirq, irq_data); in domain_associate()
232 irq_data: Arc<IrqData>, in irq_domain_set_mapping()
238 domain.revmap.write_irqsave().insert(hwirq, irq_data); in irq_domain_set_mapping()
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| H A D | manage.rs | 233 &desc.irq_data().chip_info_read_irqsave().chip(), in inner_setup_irq()
244 .insert_trigger_type(desc.irq_data().common_data().trigger_type()) in inner_setup_irq()
280 .irq_data() in inner_setup_irq()
308 desc.irq_data().chip_info_read_irqsave().chip().name(), in inner_setup_irq()
338 .irq_data() in inner_setup_irq()
352 let irq_data = desc_inner_guard.irq_data(); in inner_setup_irq() localVariable
355 let status = irq_data.common_data().status(); in inner_setup_irq()
360 irq_data.common_data().set_trigger_type(old_trigger_type); in inner_setup_irq()
419 .irq_data() in inner_setup_irq()
619 desc.irq_data().irq(), in wake_up_and_wait_for_irq_thread_ready()
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| H A D | irqchip.rs | 59 fn irq_disable(&self, irq_data: &Arc<IrqData>); in irq_disable()
62 fn irq_ack(&self, irq_data: &Arc<IrqData>); in irq_ack()
357 pub fn irq_chip_ack_parent(&self, irq_data: &Arc<IrqData>) { in irq_chip_ack_parent()
358 let parent_data = irq_data.parent_data().and_then(|p| p.upgrade()); in irq_chip_ack_parent()
369 pub fn irq_chip_retrigger_hierarchy(&self, irq_data: &Arc<IrqData>) -> Result<(), SystemError> { in irq_chip_retrigger_hierarchy()
370 let mut data: Option<Arc<IrqData>> = Some(irq_data.clone()); in irq_chip_retrigger_hierarchy()
418 let mut irq_data = Some(desc_inner.irq_data().clone()); in __irq_do_set_handler() localVariable
426 while irq_data.is_some() { in __irq_do_set_handler()
427 let dt = irq_data.as_ref().unwrap().clone(); in __irq_do_set_handler()
450 irq_data = parent_data; in __irq_do_set_handler()
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| H A D | resend.rs | 75 .irq_data() in try_retrigger()
78 .retrigger(desc_inner_guard.irq_data()) in try_retrigger()
88 return self.irq_chip_retrigger_hierarchy(desc_inner_guard.irq_data()); in try_retrigger()
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| H A D | irqdesc.rs | 91 let irq_data = Arc::new(IrqData::new( in new() localVariable
98 irq_data.irqd_set(IrqStatus::IRQD_IRQ_DISABLED); in new()
106 irq_data, in new()
125 irq_desc.irq_data().set_irq_desc(Arc::downgrade(&irq_desc)); in new()
127 irq_desc.inner().irq_data.irqd_set(irqd_flags); in new()
165 irq_data: &Arc<IrqData>, in set_handler_no_lock_inner()
168 chip.irq_bus_lock(irq_data).ok(); in set_handler_no_lock_inner()
171 chip.irq_bus_sync_unlock(irq_data).ok(); in set_handler_no_lock_inner()
193 self.inner().irq_data.irq() in irq()
197 self.inner().irq_data.hardware_irq() in hardware_irq()
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| H A D | dummychip.rs | 26 fn ack_bad(irq_data: &Arc<IrqData>) { in ack_bad()
28 CurrentIrqArch::ack_bad_irq(irq_data.irq()); in ack_bad()
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| H A D | sysfs.rs | 157 let chip = irq_desc.irq_data().chip_info_read_irqsave().chip(); in show()
213 let irq_type = if irq_desc.irq_data().is_level_type() { in show()
244 let wakeup = irq_desc.irq_data().is_wakeup_set(); in show()
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| /DragonOS/kernel/src/driver/irqchip/ |
| H A D | riscv_sifive_plic.rs | 189 fn plic_irq_toggle(cpumask: &CpuMask, irq_data: &Arc<IrqData>, enable: bool) { in plic_irq_toggle()
193 handler.toggle(irq_data.hardware_irq(), enable); in plic_irq_toggle()
243 fn irq_enable(&self, irq_data: &Arc<IrqData>) -> Result<(), SystemError> { in irq_enable()
245 let common_data = irq_data.common_data(); in irq_enable()
249 plic_irq_toggle(mask, irq_data, true); in irq_enable()
250 self.irq_unmask(irq_data).expect("irq_unmask failed"); in irq_enable()
255 fn irq_unmask(&self, irq_data: &Arc<IrqData>) -> Result<(), SystemError> { in irq_unmask()
258 let chip_data = irq_data in irq_unmask()
271 + irq_data.hardware_irq().data() as usize * PlicIrqChip::PRIORITY_PER_ID) in irq_unmask()
280 fn irq_mask(&self, irq_data: &Arc<IrqData>) -> Result<(), SystemError> { in irq_mask()
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| /DragonOS/kernel/src/arch/x86_64/driver/apic/ |
| H A D | ioapic.rs | 414 let irq_data = desc.irq_data(); in ioapic_init() localVariable
415 let mut chip_info_guard = irq_data.chip_info_write_irqsave(); in ioapic_init()
422 let level = irq_data.is_level_type(); in ioapic_init()
598 fn retrigger(&self, irq_data: &Arc<IrqData>) -> Result<(), SystemError> { in retrigger()
599 irq_manager().irq_chip_retrigger_hierarchy(irq_data) in retrigger()
651 fn irq_ack(&self, irq_data: &Arc<IrqData>) { in irq_ack()
653 self.irq_eoi(irq_data); in irq_ack()
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| H A D | apic_timer.rs | 96 let irq_data: Arc<crate::exception::irqdata::IrqData> = desc.irq_data(); in local_apic_timer_irq_desc_init() localVariable
97 let mut chip_info_guard = irq_data.chip_info_write_irqsave(); in local_apic_timer_irq_desc_init()
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| /DragonOS/kernel/src/arch/x86_64/interrupt/ |
| H A D | ipi.rs | 236 let irq_data: Arc<IrqData> = desc.irq_data(); in do_init_irq_handler() localVariable
237 let mut chip_info_guard = irq_data.chip_info_write_irqsave(); in do_init_irq_handler()
250 let irq = irq_desc.irq_data().irq(); in handle()
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