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Searched refs:kiq_ring (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gfx.c505 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_gfx_disable_kcq() local
513 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size * in amdgpu_gfx_disable_kcq()
521 kiq->pmf->kiq_unmap_queues(kiq_ring, in amdgpu_gfx_disable_kcq()
526 if (kiq_ring->sched.ready && !adev->job_hang) in amdgpu_gfx_disable_kcq()
527 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_gfx_disable_kcq()
536 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_gfx_disable_kgq() local
545 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size * in amdgpu_gfx_disable_kgq()
553 kiq->pmf->kiq_unmap_queues(kiq_ring, in amdgpu_gfx_disable_kgq()
560 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_gfx_disable_kgq()
582 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_gfx_enable_kcq() local
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Damdgpu_amdkfd_gfx_v10_3.c280 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v10_3() local
296 r = amdgpu_ring_alloc(kiq_ring, 7); in hiq_mqd_load_v10_3()
302 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in hiq_mqd_load_v10_3()
303 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3()
313 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3()
315 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in hiq_mqd_load_v10_3()
316 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in hiq_mqd_load_v10_3()
317 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v10_3()
318 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in hiq_mqd_load_v10_3()
319 amdgpu_ring_commit(kiq_ring); in hiq_mqd_load_v10_3()
Damdgpu_amdkfd_gfx_v11.c265 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v11() local
281 r = amdgpu_ring_alloc(kiq_ring, 7); in hiq_mqd_load_v11()
287 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in hiq_mqd_load_v11()
288 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v11()
298 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v11()
300 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in hiq_mqd_load_v11()
301 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in hiq_mqd_load_v11()
302 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v11()
303 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in hiq_mqd_load_v11()
304 amdgpu_ring_commit(kiq_ring); in hiq_mqd_load_v11()
Damdgpu_amdkfd_gfx_v10.c294 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in kgd_hiq_mqd_load() local
310 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_hiq_mqd_load()
316 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_hiq_mqd_load()
317 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load()
327 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load()
329 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_hiq_mqd_load()
330 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_hiq_mqd_load()
331 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_hiq_mqd_load()
332 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_hiq_mqd_load()
333 amdgpu_ring_commit(kiq_ring); in kgd_hiq_mqd_load()
Dgfx_v9_4_3.c60 static void gfx_v9_4_3_kiq_set_resources(struct amdgpu_ring *kiq_ring, in gfx_v9_4_3_kiq_set_resources() argument
63 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v9_4_3_kiq_set_resources()
64 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_set_resources()
68 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_set_resources()
70 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_set_resources()
72 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v9_4_3_kiq_set_resources()
73 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v9_4_3_kiq_set_resources()
74 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v9_4_3_kiq_set_resources()
75 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_4_3_kiq_set_resources()
78 static void gfx_v9_4_3_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx_v9_4_3_kiq_map_queues() argument
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Damdgpu_amdkfd_gfx_v9.c307 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[inst].ring; in kgd_gfx_v9_hiq_mqd_load() local
323 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_gfx_v9_hiq_mqd_load()
329 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_gfx_v9_hiq_mqd_load()
330 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load()
340 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load()
342 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_gfx_v9_hiq_mqd_load()
343 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_gfx_v9_hiq_mqd_load()
344 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_gfx_v9_hiq_mqd_load()
345 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_gfx_v9_hiq_mqd_load()
346 amdgpu_ring_commit(kiq_ring); in kgd_gfx_v9_hiq_mqd_load()
Damdgpu_gfx.h131 void (*kiq_set_resources)(struct amdgpu_ring *kiq_ring,
133 void (*kiq_map_queues)(struct amdgpu_ring *kiq_ring,
135 void (*kiq_unmap_queues)(struct amdgpu_ring *kiq_ring,
139 void (*kiq_query_status)(struct amdgpu_ring *kiq_ring,
143 void (*kiq_invalidate_tlbs)(struct amdgpu_ring *kiq_ring,
Dgfx_v11_0.c135 static void gfx11_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx11_kiq_set_resources() argument
137 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx11_kiq_set_resources()
138 amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) | in gfx11_kiq_set_resources()
140 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx11_kiq_set_resources()
141 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx11_kiq_set_resources()
142 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx11_kiq_set_resources()
143 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx11_kiq_set_resources()
144 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx11_kiq_set_resources()
145 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx11_kiq_set_resources()
148 static void gfx11_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx11_kiq_map_queues() argument
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Damdgpu_amdkfd.c824 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_amdkfd_unmap_hiq() local
848 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) { in amdgpu_amdkfd_unmap_hiq()
854 kiq->pmf->kiq_unmap_queues(kiq_ring, ring, RESET_QUEUES, 0, 0); in amdgpu_amdkfd_unmap_hiq()
856 if (kiq_ring->sched.ready && !adev->job_hang) in amdgpu_amdkfd_unmap_hiq()
857 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_amdkfd_unmap_hiq()
Dgfx_v9_0.c768 static void gfx_v9_0_kiq_set_resources(struct amdgpu_ring *kiq_ring, in gfx_v9_0_kiq_set_resources() argument
771 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v9_0_kiq_set_resources()
772 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
776 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
778 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
780 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v9_0_kiq_set_resources()
781 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v9_0_kiq_set_resources()
782 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v9_0_kiq_set_resources()
783 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_0_kiq_set_resources()
786 static void gfx_v9_0_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx_v9_0_kiq_map_queues() argument
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Dgfx_v10_0.c3496 static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx10_kiq_set_resources() argument
3498 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx10_kiq_set_resources()
3499 amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) | in gfx10_kiq_set_resources()
3501 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx10_kiq_set_resources()
3502 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx10_kiq_set_resources()
3503 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx10_kiq_set_resources()
3504 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx10_kiq_set_resources()
3505 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx10_kiq_set_resources()
3506 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx10_kiq_set_resources()
3509 static void gfx10_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx10_kiq_map_queues() argument
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Dgfx_v8_0.c4318 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_kiq_kcq_enable() local
4337 r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 8); in gfx_v8_0_kiq_kcq_enable()
4343 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v8_0_kiq_kcq_enable()
4344 amdgpu_ring_write(kiq_ring, 0); /* vmid_mask:0 queue_type:0 (KIQ) */ in gfx_v8_0_kiq_kcq_enable()
4345 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v8_0_kiq_kcq_enable()
4346 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v8_0_kiq_kcq_enable()
4347 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v8_0_kiq_kcq_enable()
4348 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v8_0_kiq_kcq_enable()
4349 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v8_0_kiq_kcq_enable()
4350 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v8_0_kiq_kcq_enable()
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Dmes_v10_1.c804 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in mes_v10_1_kiq_enable_queue() local
810 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); in mes_v10_1_kiq_enable_queue()
816 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring); in mes_v10_1_kiq_enable_queue()
818 return amdgpu_ring_test_helper(kiq_ring); in mes_v10_1_kiq_enable_queue()
Dmes_v11_0.c878 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in mes_v11_0_kiq_enable_queue() local
884 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); in mes_v11_0_kiq_enable_queue()
890 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring); in mes_v11_0_kiq_enable_queue()
892 return amdgpu_ring_test_helper(kiq_ring); in mes_v11_0_kiq_enable_queue()