768 static void gfx_v9_0_kiq_set_resources(struct amdgpu_ring *kiq_ring,  in gfx_v9_0_kiq_set_resources()  argument
771 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));  in gfx_v9_0_kiq_set_resources()
772 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_set_resources()
776 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_set_resources()
778 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_set_resources()
780 	amdgpu_ring_write(kiq_ring, 0);	/* gws mask lo */  in gfx_v9_0_kiq_set_resources()
781 	amdgpu_ring_write(kiq_ring, 0);	/* gws mask hi */  in gfx_v9_0_kiq_set_resources()
782 	amdgpu_ring_write(kiq_ring, 0);	/* oac mask */  in gfx_v9_0_kiq_set_resources()
783 	amdgpu_ring_write(kiq_ring, 0);	/* gds heap base:0, gds heap size:0 */  in gfx_v9_0_kiq_set_resources()
786 static void gfx_v9_0_kiq_map_queues(struct amdgpu_ring *kiq_ring,  in gfx_v9_0_kiq_map_queues()  argument
793 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));  in gfx_v9_0_kiq_map_queues()
795 	amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */  in gfx_v9_0_kiq_map_queues()
808 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_map_queues()
810 	amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));  in gfx_v9_0_kiq_map_queues()
811 	amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));  in gfx_v9_0_kiq_map_queues()
812 	amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));  in gfx_v9_0_kiq_map_queues()
813 	amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));  in gfx_v9_0_kiq_map_queues()
816 static void gfx_v9_0_kiq_unmap_queues(struct amdgpu_ring *kiq_ring,  in gfx_v9_0_kiq_unmap_queues()  argument
823 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));  in gfx_v9_0_kiq_unmap_queues()
824 	amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */  in gfx_v9_0_kiq_unmap_queues()
829 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_unmap_queues()
833 		amdgpu_ring_write(kiq_ring, lower_32_bits(ring->wptr & ring->buf_mask));  in gfx_v9_0_kiq_unmap_queues()
834 		amdgpu_ring_write(kiq_ring, 0);  in gfx_v9_0_kiq_unmap_queues()
835 		amdgpu_ring_write(kiq_ring, 0);  in gfx_v9_0_kiq_unmap_queues()
838 		amdgpu_ring_write(kiq_ring, 0);  in gfx_v9_0_kiq_unmap_queues()
839 		amdgpu_ring_write(kiq_ring, 0);  in gfx_v9_0_kiq_unmap_queues()
840 		amdgpu_ring_write(kiq_ring, 0);  in gfx_v9_0_kiq_unmap_queues()
844 static void gfx_v9_0_kiq_query_status(struct amdgpu_ring *kiq_ring,  in gfx_v9_0_kiq_query_status()  argument
851 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));  in gfx_v9_0_kiq_query_status()
852 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_query_status()
857 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_query_status()
860 	amdgpu_ring_write(kiq_ring, lower_32_bits(addr));  in gfx_v9_0_kiq_query_status()
861 	amdgpu_ring_write(kiq_ring, upper_32_bits(addr));  in gfx_v9_0_kiq_query_status()
862 	amdgpu_ring_write(kiq_ring, lower_32_bits(seq));  in gfx_v9_0_kiq_query_status()
863 	amdgpu_ring_write(kiq_ring, upper_32_bits(seq));  in gfx_v9_0_kiq_query_status()
866 static void gfx_v9_0_kiq_invalidate_tlbs(struct amdgpu_ring *kiq_ring,  in gfx_v9_0_kiq_invalidate_tlbs()  argument
870 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));  in gfx_v9_0_kiq_invalidate_tlbs()
871 	amdgpu_ring_write(kiq_ring,  in gfx_v9_0_kiq_invalidate_tlbs()
5462 	struct amdgpu_ring *kiq_ring = &kiq->ring;  in gfx_v9_0_ring_preempt_ib()  local
5470 	if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) {  in gfx_v9_0_ring_preempt_ib()
5484 	kiq->pmf->kiq_unmap_queues(kiq_ring, ring, PREEMPT_QUEUES_NO_UNMAP,  in gfx_v9_0_ring_preempt_ib()
5488 	amdgpu_ring_commit(kiq_ring);  in gfx_v9_0_ring_preempt_ib()