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Searched refs:invlpg (Results 1 – 7 of 7) sorted by relevance

/linux-6.6.21/Documentation/arch/x86/
Dtlb.rst14 2. Use the invlpg instruction to invalidate a single page at a
42 invlpg instruction (or instructions _near_ it) show up high in
57 You might see invlpg inside of flush_tlb_mm_range() show up in
61 Essentially, you are balancing the cycles you spend doing invlpg
/linux-6.6.21/Documentation/virt/kvm/x86/
Dmmu.rst109 - invlpg/invlpga instruction execution
241 are synchronized when the guest executes invlpg or flushes its tlb by
275 and page invalidations (invlpg).
282 guest cr3. In this case, the guest is obliged to issue an invlpg instruction
285 We synchronize modified gptes when the guest invokes invlpg. This reduces
351 invlpg handling:
/linux-6.6.21/arch/x86/kvm/
Dkvm_emulate.h177 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); member
Demulate.c3445 ctxt->ops->invlpg(ctxt, linear); in em_invlpg()
4120 II(SrcMem | ByteOp | Priv | NoAccess, em_invlpg, invlpg),
Dx86.c280 STATS_DESC_COUNTER(VCPU, invlpg),
8335 .invlpg = emulator_invlpg,
/linux-6.6.21/arch/x86/include/asm/
Dkvm_host.h1498 u64 invlpg; member
/linux-6.6.21/arch/x86/kvm/mmu/
Dmmu.c5847 ++vcpu->stat.invlpg; in kvm_mmu_invlpg()
5869 ++vcpu->stat.invlpg; in kvm_mmu_invpcid_gva()