Searched refs:hw_pp (Results 1 – 5 of 5) sorted by relevance
/linux-6.6.21/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_encoder_phys_cmd.c | 70 phys_enc->hw_pp->idx); in _dpu_encoder_phys_cmd_update_intf_cfg() 86 if (!phys_enc->hw_pp) in dpu_encoder_phys_cmd_pp_tx_done_irq() 98 phys_enc->hw_pp->idx - PINGPONG_0, in dpu_encoder_phys_cmd_pp_tx_done_irq() 115 if (!phys_enc->hw_pp) in dpu_encoder_phys_cmd_te_rd_ptr_irq() 156 phys_enc->irq[INTR_IDX_PINGPONG] = phys_enc->hw_pp->caps->intr_done; in dpu_encoder_phys_cmd_atomic_mode_set() 161 phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_pp->caps->intr_rdptr; in dpu_encoder_phys_cmd_atomic_mode_set() 175 if (!phys_enc->hw_pp) in _dpu_encoder_phys_cmd_handle_ppdone_timeout() 189 phys_enc->hw_pp->idx - PINGPONG_0, in _dpu_encoder_phys_cmd_handle_ppdone_timeout() 198 phys_enc->hw_pp->idx - PINGPONG_0, in _dpu_encoder_phys_cmd_handle_ppdone_timeout() 248 if (!phys_enc->hw_pp) { in dpu_encoder_phys_cmd_control_vblank_irq() [all …]
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D | dpu_encoder.c | 180 struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC]; member 293 static void _dpu_encoder_setup_dither(struct dpu_hw_pingpong *hw_pp, unsigned bpc) in _dpu_encoder_setup_dither() argument 297 if (!hw_pp->ops.setup_dither) in _dpu_encoder_setup_dither() 309 hw_pp->ops.setup_dither(hw_pp, NULL); in _dpu_encoder_setup_dither() 316 hw_pp->ops.setup_dither(hw_pp, &dither_cfg); in _dpu_encoder_setup_dither() 343 phys_enc->hw_pp->idx - PINGPONG_0, intr_idx); in dpu_encoder_helper_report_irq_timeout() 382 irq, phys_enc->hw_pp->idx - PINGPONG_0, in dpu_encoder_helper_wait_for_irq() 398 phys_enc->hw_pp->idx - PINGPONG_0, in dpu_encoder_helper_wait_for_irq() 409 phys_enc->hw_pp->idx - PINGPONG_0, in dpu_encoder_helper_wait_for_irq() 416 phys_enc->hw_pp->idx - PINGPONG_0, in dpu_encoder_helper_wait_for_irq() [all …]
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D | dpu_encoder_phys_wb.c | 196 struct dpu_hw_pingpong *hw_pp = phys_enc->hw_pp; in dpu_encoder_phys_wb_setup_cdp() local 204 if (mode_3d && hw_pp && hw_pp->merge_3d) in dpu_encoder_phys_wb_setup_cdp() 205 intf_cfg.merge_3d = hw_pp->merge_3d->idx; in dpu_encoder_phys_wb_setup_cdp() 207 if (phys_enc->hw_pp->merge_3d && phys_enc->hw_pp->merge_3d->ops.setup_3d_mode) in dpu_encoder_phys_wb_setup_cdp() 208 phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, in dpu_encoder_phys_wb_setup_cdp() 212 if (hw_pp && phys_enc->hw_wb->ops.bind_pingpong_blk) in dpu_encoder_phys_wb_setup_cdp() 214 phys_enc->hw_pp->idx); in dpu_encoder_phys_wb_setup_cdp() 289 struct dpu_hw_pingpong *hw_pp; in _dpu_encoder_phys_wb_update_flush() local 296 hw_pp = phys_enc->hw_pp; in _dpu_encoder_phys_wb_update_flush() 309 if (hw_ctl->ops.update_pending_flush_merge_3d && hw_pp && hw_pp->merge_3d) in _dpu_encoder_phys_wb_update_flush() [all …]
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D | dpu_encoder_phys_vid.c | 278 if (phys_enc->hw_pp->merge_3d) in dpu_encoder_phys_vid_setup_timing_engine() 279 intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx; in dpu_encoder_phys_vid_setup_timing_engine() 290 phys_enc->hw_pp->idx); in dpu_encoder_phys_vid_setup_timing_engine() 292 if (phys_enc->hw_pp->merge_3d) in dpu_encoder_phys_vid_setup_timing_engine() 293 phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, intf_cfg.mode_3d); in dpu_encoder_phys_vid_setup_timing_engine() 426 if (ctl->ops.update_pending_flush_merge_3d && phys_enc->hw_pp->merge_3d) in dpu_encoder_phys_vid_enable() 427 ctl->ops.update_pending_flush_merge_3d(ctl, phys_enc->hw_pp->merge_3d->idx); in dpu_encoder_phys_vid_enable()
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D | dpu_encoder_phys.h | 181 struct dpu_hw_pingpong *hw_pp; member
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