180 	struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];  member
293 static void _dpu_encoder_setup_dither(struct dpu_hw_pingpong *hw_pp, unsigned bpc)  in _dpu_encoder_setup_dither()  argument
297 	if (!hw_pp->ops.setup_dither)  in _dpu_encoder_setup_dither()
309 		hw_pp->ops.setup_dither(hw_pp, NULL);  in _dpu_encoder_setup_dither()
316 	hw_pp->ops.setup_dither(hw_pp, &dither_cfg);  in _dpu_encoder_setup_dither()
343 			phys_enc->hw_pp->idx - PINGPONG_0, intr_idx);  in dpu_encoder_helper_report_irq_timeout()
382 		      irq, phys_enc->hw_pp->idx - PINGPONG_0,  in dpu_encoder_helper_wait_for_irq()
398 				      phys_enc->hw_pp->idx - PINGPONG_0,  in dpu_encoder_helper_wait_for_irq()
409 				      phys_enc->hw_pp->idx - PINGPONG_0,  in dpu_encoder_helper_wait_for_irq()
416 			phys_enc->hw_pp->idx - PINGPONG_0,  in dpu_encoder_helper_wait_for_irq()
692 	} else if (dpu_enc->num_phys_encs > ARRAY_SIZE(dpu_enc->hw_pp)) {  in _dpu_encoder_update_vsync_source()
695 				(int) ARRAY_SIZE(dpu_enc->hw_pp));  in _dpu_encoder_update_vsync_source()
713 			vsync_cfg.ppnumber[i] = dpu_enc->hw_pp[i]->idx;  in _dpu_encoder_update_vsync_source()
1046 	struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC];  in dpu_encoder_virt_atomic_mode_set()  local
1076 		drm_enc->base.id, DPU_HW_BLK_PINGPONG, hw_pp,  in dpu_encoder_virt_atomic_mode_set()
1077 		ARRAY_SIZE(hw_pp));  in dpu_encoder_virt_atomic_mode_set()
1087 		dpu_enc->hw_pp[i] = i < num_pp ? to_dpu_hw_pingpong(hw_pp[i])  in dpu_encoder_virt_atomic_mode_set()
1117 		if (!dpu_enc->hw_pp[i]) {  in dpu_encoder_virt_atomic_mode_set()
1129 		phys->hw_pp = dpu_enc->hw_pp[i];  in dpu_encoder_virt_atomic_mode_set()
1167 			if (!dpu_enc->hw_pp[i])  in _dpu_encoder_virt_enable_helper()
1169 			_dpu_encoder_setup_dither(dpu_enc->hw_pp[i], bpc);  in _dpu_encoder_virt_enable_helper()
1481 	if (!phys->hw_pp) {  in _dpu_encoder_trigger_flush()
1521 	if (!phys->hw_pp) {  in _dpu_encoder_trigger_start()
1799 				     struct dpu_hw_pingpong *hw_pp,  in dpu_encoder_dsc_pipe_cfg()  argument
1810 	if (hw_pp->ops.setup_dsc)  in dpu_encoder_dsc_pipe_cfg()
1811 		hw_pp->ops.setup_dsc(hw_pp);  in dpu_encoder_dsc_pipe_cfg()
1814 		hw_dsc->ops.dsc_bind_pingpong_blk(hw_dsc, hw_pp->idx);  in dpu_encoder_dsc_pipe_cfg()
1816 	if (hw_pp->ops.enable_dsc)  in dpu_encoder_dsc_pipe_cfg()
1817 		hw_pp->ops.enable_dsc(hw_pp);  in dpu_encoder_dsc_pipe_cfg()
1830 	struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];  in dpu_encoder_prep_dsc()  local
1839 		hw_pp[i] = dpu_enc->hw_pp[i];  in dpu_encoder_prep_dsc()
1842 		if (!hw_pp[i] || !hw_dsc[i]) {  in dpu_encoder_prep_dsc()
1866 		dpu_encoder_dsc_pipe_cfg(ctl, hw_dsc[i], hw_pp[i],  in dpu_encoder_prep_dsc()
1992 				     struct dpu_hw_pingpong *hw_pp)  in dpu_encoder_dsc_pipe_clr()  argument
1997 	if (hw_pp->ops.disable_dsc)  in dpu_encoder_dsc_pipe_clr()
1998 		hw_pp->ops.disable_dsc(hw_pp);  in dpu_encoder_dsc_pipe_clr()
2013 	struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];  in dpu_encoder_unprep_dsc()  local
2017 		hw_pp[i] = dpu_enc->hw_pp[i];  in dpu_encoder_unprep_dsc()
2020 		if (hw_pp[i] && hw_dsc[i])  in dpu_encoder_unprep_dsc()
2021 			dpu_encoder_dsc_pipe_clr(ctl, hw_dsc[i], hw_pp[i]);  in dpu_encoder_unprep_dsc()
2066 	if (phys_enc->hw_pp && phys_enc->hw_pp->merge_3d) {  in dpu_encoder_helper_phys_cleanup()
2067 		phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d,  in dpu_encoder_helper_phys_cleanup()
2071 					phys_enc->hw_pp->merge_3d->idx);  in dpu_encoder_helper_phys_cleanup()
2088 	if (phys_enc->hw_pp && phys_enc->hw_pp->merge_3d)  in dpu_encoder_helper_phys_cleanup()
2089 		intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx;  in dpu_encoder_helper_phys_cleanup()