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Searched refs:enable_mask (Results 1 – 25 of 362) sorted by relevance

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/linux-6.6.21/drivers/clk/qcom/
Dgcc-msm8660.c46 .enable_mask = BIT(8),
125 .enable_mask = BIT(11),
141 .enable_mask = BIT(9),
176 .enable_mask = BIT(11),
192 .enable_mask = BIT(9),
227 .enable_mask = BIT(11),
243 .enable_mask = BIT(9),
278 .enable_mask = BIT(11),
294 .enable_mask = BIT(9),
329 .enable_mask = BIT(11),
[all …]
Dgcc-sm8250.c40 .enable_mask = BIT(0),
79 .enable_mask = BIT(4),
96 .enable_mask = BIT(9),
1063 .enable_mask = BIT(0),
1078 .enable_mask = BIT(0),
1098 .enable_mask = BIT(0),
1116 .enable_mask = BIT(0),
1134 .enable_mask = BIT(0),
1154 .enable_mask = BIT(10),
1167 .enable_mask = BIT(0),
[all …]
Dgcc-mdm9615.c65 .enable_mask = BIT(0),
78 .enable_mask = BIT(4),
107 .enable_mask = BIT(8),
136 .enable_mask = BIT(11),
207 .enable_mask = BIT(11),
223 .enable_mask = BIT(9),
258 .enable_mask = BIT(11),
274 .enable_mask = BIT(9),
309 .enable_mask = BIT(11),
325 .enable_mask = BIT(9),
[all …]
Dgcc-ipq806x.c50 .enable_mask = BIT(0),
79 .enable_mask = BIT(4),
108 .enable_mask = BIT(8),
215 .enable_mask = BIT(14),
433 .enable_mask = BIT(11),
449 .enable_mask = BIT(9),
484 .enable_mask = BIT(11),
500 .enable_mask = BIT(9),
535 .enable_mask = BIT(11),
551 .enable_mask = BIT(9),
[all …]
Dgcc-sm8150.c40 .enable_mask = BIT(0),
83 .enable_mask = BIT(7),
101 .enable_mask = BIT(9),
1096 .enable_mask = BIT(0),
1111 .enable_mask = BIT(0),
1130 .enable_mask = BIT(1),
1149 .enable_mask = BIT(0),
1168 .enable_mask = BIT(1),
1185 .enable_mask = BIT(0),
1202 .enable_mask = BIT(0),
[all …]
Dgcc-msm8960.c48 .enable_mask = BIT(4),
79 .enable_mask = BIT(8),
278 .enable_mask = BIT(14),
370 .enable_mask = BIT(11),
386 .enable_mask = BIT(9),
421 .enable_mask = BIT(11),
437 .enable_mask = BIT(9),
472 .enable_mask = BIT(11),
488 .enable_mask = BIT(9),
523 .enable_mask = BIT(11),
[all …]
Dgcc-sc8180x.c53 .enable_mask = BIT(0),
95 .enable_mask = BIT(1),
114 .enable_mask = BIT(4),
133 .enable_mask = BIT(7),
1365 .enable_mask = BIT(0),
1380 .enable_mask = BIT(0),
1400 .enable_mask = BIT(1),
1420 .enable_mask = BIT(0),
1440 .enable_mask = BIT(1),
1458 .enable_mask = BIT(0),
[all …]
Dgcc-sc8280xp.c117 .enable_mask = BIT(0),
154 .enable_mask = BIT(2),
169 .enable_mask = BIT(4),
184 .enable_mask = BIT(7),
199 .enable_mask = BIT(8),
214 .enable_mask = BIT(9),
2530 .enable_mask = BIT(14),
2545 .enable_mask = BIT(21),
2560 .enable_mask = BIT(12),
2575 .enable_mask = BIT(13),
[all …]
Dgcc-sm6350.c39 .enable_mask = BIT(0),
100 .enable_mask = BIT(6),
139 .enable_mask = BIT(7),
799 .enable_mask = BIT(0),
819 .enable_mask = BIT(1),
839 .enable_mask = BIT(1),
859 .enable_mask = BIT(0),
879 .enable_mask = BIT(28),
894 .enable_mask = BIT(0),
910 .enable_mask = BIT(0),
[all …]
Dgcc-msm8996.c53 .enable_mask = BIT(0),
95 .enable_mask = BIT(0),
112 .enable_mask = BIT(2),
130 .enable_mask = BIT(4),
1181 .enable_mask = BIT(0),
1198 .enable_mask = BIT(0),
1215 .enable_mask = BIT(0),
1232 .enable_mask = BIT(0),
1245 .enable_mask = BIT(0),
1258 .enable_mask = BIT(0),
[all …]
Dgcc-sm8450.c44 .enable_mask = BIT(0),
83 .enable_mask = BIT(4),
100 .enable_mask = BIT(9),
1129 .enable_mask = BIT(12),
1144 .enable_mask = BIT(11),
1159 .enable_mask = BIT(0),
1179 .enable_mask = BIT(1),
1199 .enable_mask = BIT(0),
1219 .enable_mask = BIT(10),
1234 .enable_mask = BIT(0),
[all …]
Dmmcc-msm8960.c196 .enable_mask = BIT(2),
211 .enable_mask = BIT(0),
247 .enable_mask = BIT(2),
262 .enable_mask = BIT(0),
298 .enable_mask = BIT(2),
313 .enable_mask = BIT(0),
355 .enable_mask = BIT(2),
370 .enable_mask = BIT(0),
388 .enable_mask = BIT(8),
423 .enable_mask = BIT(2),
[all …]
Dgcc-sm7150.c46 .enable_mask = BIT(0),
101 .enable_mask = BIT(6),
118 .enable_mask = BIT(7),
973 .enable_mask = BIT(0),
988 .enable_mask = BIT(0),
1008 .enable_mask = BIT(1),
1026 .enable_mask = BIT(0),
1044 .enable_mask = BIT(0),
1064 .enable_mask = BIT(10),
1077 .enable_mask = BIT(0),
[all …]
Dgcc-sm6125.c46 .enable_mask = BIT(0),
89 .enable_mask = BIT(3),
106 .enable_mask = BIT(4),
123 .enable_mask = BIT(5),
140 .enable_mask = BIT(6),
170 .enable_mask = BIT(7),
200 .enable_mask = BIT(8),
230 .enable_mask = BIT(9),
1363 .enable_mask = BIT(0),
1378 .enable_mask = BIT(0),
[all …]
Dgcc-msm8998.c42 .enable_mask = BIT(0),
113 .enable_mask = BIT(1),
184 .enable_mask = BIT(2),
255 .enable_mask = BIT(3),
326 .enable_mask = BIT(4),
1222 .enable_mask = BIT(0),
1235 .enable_mask = BIT(0),
1253 .enable_mask = BIT(0),
1271 .enable_mask = BIT(0),
1284 .enable_mask = BIT(0),
[all …]
Dgcc-sc7180.c40 .enable_mask = BIT(0),
93 .enable_mask = BIT(1),
111 .enable_mask = BIT(4),
129 .enable_mask = BIT(6),
147 .enable_mask = BIT(7),
833 .enable_mask = BIT(0),
851 .enable_mask = BIT(0),
871 .enable_mask = BIT(10),
884 .enable_mask = BIT(0),
899 .enable_mask = BIT(0),
[all …]
Dgcc-msm8917.c58 .enable_mask = BIT(23),
76 .enable_mask = BIT(0),
150 .enable_mask = BIT(5),
195 .enable_mask = BIT(7),
1212 .enable_mask = BIT(1),
1225 .enable_mask = BIT(0),
1238 .enable_mask = BIT(0),
1251 .enable_mask = BIT(10),
1264 .enable_mask = BIT(20),
1277 .enable_mask = BIT(0),
[all …]
Dgcc-sa8775p.c80 .enable_mask = BIT(0),
117 .enable_mask = BIT(1),
132 .enable_mask = BIT(4),
147 .enable_mask = BIT(5),
162 .enable_mask = BIT(7),
177 .enable_mask = BIT(9),
1692 .enable_mask = BIT(28),
1707 .enable_mask = BIT(0),
1727 .enable_mask = BIT(0),
1747 .enable_mask = BIT(1),
[all …]
Dgcc-msm8976.c75 .enable_mask = BIT(0),
108 .enable_mask = BIT(2),
145 .enable_mask = BIT(4),
192 .enable_mask = BIT(5),
223 .enable_mask = BIT(7),
1658 .enable_mask = BIT(0),
1675 .enable_mask = BIT(0),
1693 .enable_mask = BIT(0),
1711 .enable_mask = BIT(0),
1729 .enable_mask = BIT(0),
[all …]
Dgcc-ipq5332.c55 .enable_mask = BIT(0),
95 .enable_mask = BIT(1),
123 .enable_mask = BIT(2),
574 .enable_mask = BIT(1),
617 .enable_mask = BIT(1),
680 .enable_mask = BIT(1),
1158 .enable_mask = BIT(0),
1176 .enable_mask = BIT(0),
1194 .enable_mask = BIT(4),
1212 .enable_mask = BIT(0),
[all …]
Dgcc-ipq5018.c65 .enable_mask = BIT(0),
80 .enable_mask = BIT(2),
95 .enable_mask = BIT(5),
110 .enable_mask = BIT(6),
1334 .enable_mask = BIT(1),
1348 .enable_mask = BIT(1),
1363 .enable_mask = BIT(0),
1380 .enable_mask = BIT(0),
1398 .enable_mask = BIT(10),
1415 .enable_mask = BIT(0),
[all …]
Dgcc-sc7280.c48 .enable_mask = BIT(0),
109 .enable_mask = BIT(1),
126 .enable_mask = BIT(9),
143 .enable_mask = BIT(4),
160 .enable_mask = BIT(8),
176 .enable_mask = BIT(17),
1234 .enable_mask = BIT(0),
1247 .enable_mask = BIT(0),
1262 .enable_mask = BIT(12),
1277 .enable_mask = BIT(11),
[all …]
Dgcc-sdm845.c42 .enable_mask = BIT(0),
59 .enable_mask = BIT(4),
76 .enable_mask = BIT(6),
1136 .enable_mask = BIT(0),
1151 .enable_mask = BIT(0),
1171 .enable_mask = BIT(0),
1189 .enable_mask = BIT(0),
1207 .enable_mask = BIT(0),
1225 .enable_mask = BIT(0),
1245 .enable_mask = BIT(10),
[all …]
Dgcc-sm8350.c48 .enable_mask = BIT(0),
87 .enable_mask = BIT(4),
105 .enable_mask = BIT(9),
1244 .enable_mask = BIT(12),
1258 .enable_mask = BIT(11),
1273 .enable_mask = BIT(18),
1288 .enable_mask = BIT(0),
1308 .enable_mask = BIT(1),
1328 .enable_mask = BIT(0),
1348 .enable_mask = BIT(1),
[all …]
Dgcc-qdu1000.c55 .enable_mask = BIT(0),
93 .enable_mask = BIT(1),
127 .enable_mask = BIT(2),
161 .enable_mask = BIT(3),
178 .enable_mask = BIT(4),
195 .enable_mask = BIT(5),
229 .enable_mask = BIT(6),
246 .enable_mask = BIT(7),
263 .enable_mask = BIT(8),
1033 .enable_mask = BIT(0),
[all …]

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