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Searched refs:dbi_base (Results 1 – 17 of 17) sorted by relevance

/linux-6.6.21/drivers/pci/controller/dwc/
Dpci-layerscape.c60 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_is_bridge()
71 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_clear_multifunction()
80 val = ioread32(pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
82 iowrite32(val, pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
90 iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); in ls_pcie_fix_error_response()
203 struct resource *dbi_base; in ls_pcie_probe() local
220 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); in ls_pcie_probe()
221 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in ls_pcie_probe()
222 if (IS_ERR(pci->dbi_base)) in ls_pcie_probe()
223 return PTR_ERR(pci->dbi_base); in ls_pcie_probe()
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Dpci-layerscape-ep.c57 return ioread32be(pci->dbi_base + offset); in ls_lut_readl()
59 return ioread32(pci->dbi_base + offset); in ls_lut_readl()
67 iowrite32be(value, pci->dbi_base + offset); in ls_lut_writel()
69 iowrite32(value, pci->dbi_base + offset); in ls_lut_writel()
233 struct resource *dbi_base; in ls_pcie_ep_probe() local
260 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); in ls_pcie_ep_probe()
261 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in ls_pcie_ep_probe()
262 if (IS_ERR(pci->dbi_base)) in ls_pcie_ep_probe()
263 return PTR_ERR(pci->dbi_base); in ls_pcie_ep_probe()
Dpcie-al.c19 void __iomem *dbi_base; member
27 void __iomem *dbi_base = pcie->dbi_base; in al_pcie_map_bus() local
37 return dbi_base + where; in al_pcie_map_bus()
69 al_pcie->dbi_base = devm_pci_remap_cfg_resource(dev, res); in al_pcie_init()
70 if (IS_ERR(al_pcie->dbi_base)) in al_pcie_init()
71 return PTR_ERR(al_pcie->dbi_base); in al_pcie_init()
Dpcie-tegra194-acpi.c19 void __iomem *dbi_base; member
33 pcie_ecam->dbi_base = cfg->win + SZ_512K; in tegra194_acpi_init()
79 return pcie_ecam->dbi_base + where; in tegra194_map_bus()
Dpcie-designware.c110 if (!pci->dbi_base) { in dw_pcie_get_resources()
112 pci->dbi_base = devm_pci_remap_cfg_resource(pci->dev, res); in dw_pcie_get_resources()
113 if (IS_ERR(pci->dbi_base)) in dw_pcie_get_resources()
114 return PTR_ERR(pci->dbi_base); in dw_pcie_get_resources()
125 pci->dbi_base2 = pci->dbi_base + SZ_4K; in dw_pcie_get_resources()
138 pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET; in dw_pcie_get_resources()
330 return pci->ops->read_dbi(pci, pci->dbi_base, reg, size); in dw_pcie_read_dbi()
332 ret = dw_pcie_read(pci->dbi_base + reg, size, &val); in dw_pcie_read_dbi()
345 pci->ops->write_dbi(pci, pci->dbi_base, reg, size, val); in dw_pcie_write_dbi()
349 ret = dw_pcie_write(pci->dbi_base + reg, size, val); in dw_pcie_write_dbi()
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Dpcie-qcom.c278 val = readl(pci->dbi_base + offset + PCI_EXP_SLTCAP); in qcom_pcie_clear_hpc()
280 writel(val, pci->dbi_base + offset + PCI_EXP_SLTCAP); in qcom_pcie_clear_hpc()
436 pci->dbi_base + AXI_MSTR_RESP_COMP_CTRL0); in qcom_pcie_post_init_2_1_0()
438 pci->dbi_base + AXI_MSTR_RESP_COMP_CTRL1); in qcom_pcie_post_init_2_1_0()
813 writel(PCI_COMMAND_MASTER, pci->dbi_base + PCI_COMMAND); in qcom_pcie_post_init_2_3_3()
817 writel(PCIE_CAP_SLOT_VAL, pci->dbi_base + offset + PCI_EXP_SLTCAP); in qcom_pcie_post_init_2_3_3()
819 val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_post_init_2_3_3()
821 writel(val, pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_post_init_2_3_3()
823 writel(PCI_EXP_DEVCTL2_COMP_TMOUT_DIS, pci->dbi_base + offset + in qcom_pcie_post_init_2_3_3()
1125 pci->dbi_base + GEN3_RELATED_OFF); in qcom_pcie_post_init_2_9_0()
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Dpcie-armada8k.c308 pci->dbi_base = devm_pci_remap_cfg_resource(dev, base); in armada8k_pcie_probe()
309 if (IS_ERR(pci->dbi_base)) { in armada8k_pcie_probe()
310 ret = PTR_ERR(pci->dbi_base); in armada8k_pcie_probe()
Dpci-dra7xx.c455 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "ep_dbics"); in dra7xx_add_pcie_ep()
456 if (IS_ERR(pci->dbi_base)) in dra7xx_add_pcie_ep()
457 return PTR_ERR(pci->dbi_base); in dra7xx_add_pcie_ep()
492 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "rc_dbics"); in dra7xx_add_pcie_port()
493 if (IS_ERR(pci->dbi_base)) in dra7xx_add_pcie_port()
494 return PTR_ERR(pci->dbi_base); in dra7xx_add_pcie_port()
Dpcie-histb.c323 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "rc-dbi"); in histb_pcie_probe()
324 if (IS_ERR(pci->dbi_base)) { in histb_pcie_probe()
326 return PTR_ERR(pci->dbi_base); in histb_pcie_probe()
Dpcie-qcom-ep.c293 status = readw(pci->dbi_base + offset + PCI_EXP_LNKSTA); in qcom_pcie_ep_icc_update()
555 pci->dbi_base = devm_pci_remap_cfg_resource(dev, res); in qcom_pcie_ep_get_io_resources()
556 if (IS_ERR(pci->dbi_base)) in qcom_pcie_ep_get_io_resources()
557 return PTR_ERR(pci->dbi_base); in qcom_pcie_ep_get_io_resources()
558 pci->dbi_base2 = pci->dbi_base; in qcom_pcie_ep_get_io_resources()
Dpci-meson.c113 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "elbi"); in meson_pcie_get_mems()
114 if (IS_ERR(pci->dbi_base)) in meson_pcie_get_mems()
115 return PTR_ERR(pci->dbi_base); in meson_pcie_get_mems()
Dpci-imx6.c1126 pci->dbi_base2 = pci->dbi_base + pcie_dbi2_offset; in imx6_add_pcie_ep()
1251 struct resource *dbi_base; in imx6_pcie_probe() local
1286 pci->dbi_base = devm_platform_get_and_ioremap_resource(pdev, 0, &dbi_base); in imx6_pcie_probe()
1287 if (IS_ERR(pci->dbi_base)) in imx6_pcie_probe()
1288 return PTR_ERR(pci->dbi_base); in imx6_pcie_probe()
1335 if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) in imx6_pcie_probe()
Dpcie-intel-gw.c108 pcie_update_bits(pcie->pci.dbi_base, ofs, mask, val); in pcie_rc_cfg_wr_mask()
302 pci->atu_base = pci->dbi_base + 0xC0000; in intel_pcie_host_setup()
Dpcie-spear13xx.c131 spear13xx_pcie->app_base = pci->dbi_base + 0x2000; in spear13xx_pcie_host_init()
Dpci-keystone.c822 pci->dbi_base + PCI_IO_BASE); in ks_pcie_host_init()
1158 pci->dbi_base = base; in ks_pcie_probe()
Dpcie-designware.h385 void __iomem *dbi_base; member
Dpcie-designware-host.c637 return pci->dbi_base + where; in dw_pcie_own_conf_map_bus()