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Searched refs:control_value (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/hisilicon/hibmc/
Dhibmc_drm_drv.c133 u32 control_value = 0; in hibmc_set_power_mode() local
143 control_value = readl(mmio + HIBMC_POWER_MODE_CTRL); in hibmc_set_power_mode()
144 control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK | in hibmc_set_power_mode()
146 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode); in hibmc_set_power_mode()
147 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input); in hibmc_set_power_mode()
148 writel(control_value, mmio + HIBMC_POWER_MODE_CTRL); in hibmc_set_power_mode()
/linux-6.6.21/drivers/mmc/host/
Dsdhci-pci-gli.c271 u32 control_value; in gli_set_9750() local
281 control_value = sdhci_readl(host, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
320 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1; in gli_set_9750()
321 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2; in gli_set_9750()
322 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1, in gli_set_9750()
324 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2, in gli_set_9750()
336 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN; in gli_set_9750()
337 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN, in gli_set_9750()
339 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
345 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN; in gli_set_9750()
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/linux-6.6.21/drivers/gpu/drm/i915/gt/
Dintel_mocs.c17 u32 control_value; member
89 .control_value = __control_value, \
612 return table->table[index].control_value; in get_entry_control()
613 return table->table[table->unused_entries_index].control_value; in get_entry_control()
/linux-6.6.21/drivers/net/ethernet/qlogic/netxen/
Dnetxen_nic.h1421 u32 control_value; member
1496 u32 control_value; member