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/linux-6.6.21/arch/arm/mach-omap2/
Dpowerdomains7xx_data.c37 .banks = 4,
78 .banks = 2,
92 .banks = 1,
105 .banks = 2,
119 .banks = 1,
132 .banks = 1,
144 .banks = 5,
170 .banks = 1,
186 .banks = 1,
201 .banks = 1,
[all …]
Dpowerdomains44xx_data.c38 .banks = 5,
63 .banks = 1,
81 .banks = 2,
101 .banks = 1,
119 .banks = 3,
140 .banks = 1,
157 .banks = 1,
174 .banks = 1,
190 .banks = 1,
207 .banks = 3,
[all …]
Dpowerdomains54xx_data.c36 .banks = 5,
62 .banks = 2,
91 .banks = 1,
109 .banks = 1,
126 .banks = 1,
142 .banks = 1,
159 .banks = 2,
188 .banks = 3,
209 .banks = 1,
227 .banks = 2,
[all …]
Dpowerdomains3xxx_data.c37 .banks = 4,
59 .banks = 1,
75 .banks = 1,
100 .banks = 2,
122 .banks = 2,
139 .banks = 2,
156 .banks = 1,
171 .banks = 1,
192 .banks = 1,
207 .banks = 1,
[all …]
Dpowerdomains2xxx_data.c31 .banks = 1,
46 .banks = 1,
61 .banks = 3,
87 .banks = 1,
Dpowerdomains43xx_data.c23 .banks = 1,
37 .banks = 3,
65 .banks = 1,
95 .banks = 4,
Dpowerdomains33xx_data.c25 .banks = 1,
76 .banks = 3,
119 .banks = 3,
Dpowerdomain.c129 for (i = 0; i < pwrdm->banks; i++) in _pwrdm_register()
152 for (i = 0; i < pwrdm->banks; i++) { in _update_logic_membank_counters()
515 return pwrdm->banks; in pwrdm_get_mem_bank_count()
672 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_onst()
710 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_retst()
806 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_pwrst()
836 if (pwrdm->banks < (bank + 1)) in pwrdm_read_prev_mem_pwrst()
865 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_retst()
/linux-6.6.21/arch/x86/kernel/cpu/mce/
Dintel.c83 static int cmci_supported(int *banks) in cmci_supported() argument
102 *banks = min_t(unsigned, MAX_NR_BANKS, cap & 0xff); in cmci_supported()
274 static void cmci_discover(int banks) in cmci_discover() argument
282 for (i = 0; i < banks; i++) { in cmci_discover()
352 int banks; in cmci_recheck() local
354 if (!mce_available(raw_cpu_ptr(&cpu_info)) || !cmci_supported(&banks)) in cmci_recheck()
383 int banks; in cmci_clear() local
385 if (!cmci_supported(&banks)) in cmci_clear()
388 for (i = 0; i < banks; i++) in cmci_clear()
395 int banks; in cmci_rediscover_work_func() local
[all …]
/linux-6.6.21/drivers/net/ethernet/intel/ice/
Dice_nvm.c249 struct ice_bank_info *banks = &hw->flash.banks; in ice_get_flash_bank_offset() local
256 offset = banks->nvm_ptr; in ice_get_flash_bank_offset()
257 size = banks->nvm_size; in ice_get_flash_bank_offset()
258 active_bank = banks->nvm_bank; in ice_get_flash_bank_offset()
261 offset = banks->orom_ptr; in ice_get_flash_bank_offset()
262 size = banks->orom_size; in ice_get_flash_bank_offset()
263 active_bank = banks->orom_bank; in ice_get_flash_bank_offset()
266 offset = banks->netlist_ptr; in ice_get_flash_bank_offset()
267 size = banks->netlist_size; in ice_get_flash_bank_offset()
268 active_bank = banks->netlist_bank; in ice_get_flash_bank_offset()
[all …]
/linux-6.6.21/drivers/pinctrl/qcom/
Dpinctrl-ssbi-gpio.c325 u8 banks = 0; in pm8xxx_pin_config_set() local
335 banks |= BIT(2); in pm8xxx_pin_config_set()
337 banks |= BIT(3); in pm8xxx_pin_config_set()
341 banks |= BIT(2); in pm8xxx_pin_config_set()
343 banks |= BIT(3); in pm8xxx_pin_config_set()
354 banks |= BIT(2); in pm8xxx_pin_config_set()
356 banks |= BIT(3); in pm8xxx_pin_config_set()
360 banks |= BIT(3); in pm8xxx_pin_config_set()
364 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
369 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
[all …]
/linux-6.6.21/drivers/memory/
Dfsl_ifc.c54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
207 int version, banks; in fsl_ifc_ctrl_probe() local
237 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; in fsl_ifc_ctrl_probe()
239 version >> 24, (version >> 16) & 0xf, banks); in fsl_ifc_ctrl_probe()
242 fsl_ifc_ctrl_dev->banks = banks; in fsl_ifc_ctrl_probe()
/linux-6.6.21/drivers/clk/tegra/
Dclk.c213 static int tegra_clk_periph_ctx_init(int banks) in tegra_clk_periph_ctx_init() argument
215 periph_state_ctx = kcalloc(2 * banks, sizeof(*periph_state_ctx), in tegra_clk_periph_ctx_init()
223 struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) in tegra_clk_init() argument
227 if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) in tegra_clk_init()
230 periph_clk_enb_refcnt = kcalloc(32 * banks, in tegra_clk_init()
236 periph_banks = banks; in tegra_clk_init()
247 if (tegra_clk_periph_ctx_init(banks)) { in tegra_clk_init()
/linux-6.6.21/drivers/crypto/intel/qat/qat_common/
Dadf_vf_isr.c166 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr()
205 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, in adf_setup_bh()
206 (unsigned long)priv_data->banks); in adf_setup_bh()
214 tasklet_disable(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
215 tasklet_kill(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
Dadf_isr.c168 free_irq(irq, &etr_data->banks[i]); in adf_free_irqs()
192 struct adf_etr_bank_data *bank = &etr_data->banks[i]; in adf_request_irqs()
280 tasklet_init(&priv_data->banks[i].resp_handler, in adf_setup_bh()
282 (unsigned long)&priv_data->banks[i]); in adf_setup_bh()
293 tasklet_disable(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
294 tasklet_kill(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
Dadf_gen2_config.c16 int banks = GET_MAX_BANKS(accel_dev); in adf_gen2_crypto_dev_config() local
24 instances = min(cpus, banks); in adf_gen2_crypto_dev_config()
115 int banks = GET_MAX_BANKS(accel_dev); in adf_gen2_comp_dev_config() local
123 instances = min(cpus, banks); in adf_gen2_comp_dev_config()
Dadf_transport.c261 bank = &transport_data->banks[bank_num]; in adf_create_ring()
490 etr_data->banks = kzalloc_node(size, GFP_KERNEL, in adf_init_etr_data()
492 if (!etr_data->banks) { in adf_init_etr_data()
506 ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, in adf_init_etr_data()
516 kfree(etr_data->banks); in adf_init_etr_data()
551 cleanup_bank(&etr_data->banks[i]); in adf_cleanup_etr_handles()
571 kfree(etr_data->banks->rings); in adf_cleanup_etr_data()
572 kfree(etr_data->banks); in adf_cleanup_etr_data()
/linux-6.6.21/Documentation/devicetree/bindings/pinctrl/
Dsamsung,pinctrl-gpio-bank.yaml31 For GPIO banks supporting external GPIO interrupts or external wake-up
37 For GPIO banks supporting external GPIO interrupts or external wake-up
42 For GPIO banks supporting direct external wake-up interrupts (without
/linux-6.6.21/arch/mips/bcm63xx/
Dcpu.c258 unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; in detect_memory_size() local
274 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; in detect_memory_size()
282 banks = 2; in detect_memory_size()
291 return 1 << (cols + rows + (is_32bits + 1) + banks); in detect_memory_size()
/linux-6.6.21/drivers/soc/mediatek/
Dmtk-svs.c335 struct svs_bank *banks; member
347 struct svs_bank *banks; member
662 svsb = &svsp->banks[idx]; in svs_dump_debug_show()
823 svsb = &svsp->banks[idx]; in svs_create_debug_cmds()
1256 svsb = &svsp->banks[idx]; in svs_isr()
1309 svsb = &svsp->banks[idx]; in svs_init01()
1346 svsb = &svsp->banks[idx]; in svs_init01()
1391 svsb = &svsp->banks[idx]; in svs_init01()
1425 svsb = &svsp->banks[idx]; in svs_init01()
1473 svsb = &svsp->banks[idx]; in svs_init02()
[all …]
/linux-6.6.21/Documentation/devicetree/bindings/gpio/
Dbrcm,kona-gpio.yaml11 support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
35 GPIO banks on the SoC. The interrupts must be ordered by bank, starting
36 with bank 0. There is always a 1:1 mapping between banks and IRQs.
/linux-6.6.21/drivers/pinctrl/vt8500/
Dpinctrl-wmt.c89 u32 reg_en = data->banks[bank].reg_en; in wmt_set_pinmux()
90 u32 reg_dir = data->banks[bank].reg_dir; in wmt_set_pinmux()
426 u32 reg_pull_en = data->banks[bank].reg_pull_en; in wmt_pinconf_set()
427 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; in wmt_pinconf_set()
485 u32 reg_dir = data->banks[bank].reg_dir; in wmt_gpio_get_direction()
500 u32 reg_data_in = data->banks[bank].reg_data_in; in wmt_gpio_get_value()
516 u32 reg_data_out = data->banks[bank].reg_data_out; in wmt_gpio_set_value()
/linux-6.6.21/drivers/phy/mediatek/
DKconfig26 different banks layout, the T-PHY with shared banks between
28 so you can easily distinguish them by banks layout.
/linux-6.6.21/drivers/gpio/
Dgpio-pxa.c81 struct pxa_gpio_bank *banks; member
150 for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++)
162 struct pxa_gpio_bank *bank = p->banks + (gpio / 32); in gpio_bank_base()
170 return chip_to_pxachip(c)->banks + gpio / 32; in gpio_to_pxabank()
346 pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), in pxa_init_gpio_chip()
348 if (!pchip->banks) in pxa_init_gpio_chip()
368 bank = pchip->banks + i; in pxa_init_gpio_chip()
/linux-6.6.21/Documentation/devicetree/bindings/ata/
Dcavium-compact-flash.txt12 - reg: The base address of the CF chip select banks. Depending on
13 the device configuration, there may be one or two banks.

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