Searched refs:IS_ROCKETLAKE (Results 1 – 25 of 26) sorted by relevance
12
101 !IS_ROCKETLAKE(dev_priv)); in intel_pch_type()126 !IS_ROCKETLAKE(dev_priv) && in intel_pch_type()180 else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_virt_detect_pch()
145 IS_ROCKETLAKE(i915) || in has_phy_misc()213 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in phy_is_master()
39 #define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
260 if (IS_ROCKETLAKE(dev_priv)) { in icl_get_qgv_points()674 else if (IS_ROCKETLAKE(dev_priv)) in intel_bw_init_hw()
3226 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_get_combo_phy_dpll()3558 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_pll_get_hw_state()3622 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_dpll_write()4154 else if (IS_ROCKETLAKE(dev_priv)) in intel_shared_dpll_init()
2205 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { in map_ddc_pin()2349 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in dvo_port_to_port()3515 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) { in map_aux_ch()
345 if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) in intel_dsc_power_domain()
1055 } else if (IS_ROCKETLAKE(i915)) { in intel_dmc_init()
1723 } else if (IS_ROCKETLAKE(i915)) { in intel_ddi_buf_trans_init()
1372 if ((IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) && in i915_audio_component_init()
1665 else if (IS_ROCKETLAKE(i915)) in intel_display_power_map_init()
1612 (IS_ROCKETLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))) in tgl_bw_buddy_init()
2198 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || in gen12_plane_has_mc_ccs()
4872 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_ddi_init()4949 else if (IS_ROCKETLAKE(dev_priv)) in intel_ddi_init()
2897 else if (IS_ROCKETLAKE(dev_priv)) in intel_hdmi_default_ddc_pin()
1085 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
3592 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_init_cdclk_hooks()
1750 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_phy_is_combo()1802 else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) in intel_port_to_phy()
88 IS_ROCKETLAKE(i915) || in mmio_invalidate_full()
2518 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2533 IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2546 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2555 if (IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()2569 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || in rcs_engine_wa_init()
547 } else if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in get_mocs_settings()
213 } else if (IS_ROCKETLAKE(i915)) { in intel_step_init()
567 #define IS_ROCKETLAKE(i915) IS_PLATFORM(i915, INTEL_ROCKETLAKE) macro
40 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()
497 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) { in set_proto_ctx_engines_bond()