/linux-6.6.21/include/dt-bindings/clock/ |
D | mt8135-clk.h | 49 #define CLK_TOP_UNIVPLL2_D4 38 macro
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D | mt7629-clk.h | 55 #define CLK_TOP_UNIVPLL2_D4 45 macro
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D | mt7622-clk.h | 49 #define CLK_TOP_UNIVPLL2_D4 37 macro
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D | mediatek,mt6795-clk.h | 76 #define CLK_TOP_UNIVPLL2_D4 65 macro
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D | mt6797-clk.h | 73 #define CLK_TOP_UNIVPLL2_D4 63 macro
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D | mt8173-clk.h | 78 #define CLK_TOP_UNIVPLL2_D4 68 macro
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D | mt6765-clk.h | 62 #define CLK_TOP_UNIVPLL2_D4 27 macro
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D | mediatek,mt8365-clk.h | 37 #define CLK_TOP_UNIVPLL2_D4 27 macro
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D | mt2712-clk.h | 62 #define CLK_TOP_UNIVPLL2_D4 31 macro
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D | mt2701-clk.h | 40 #define CLK_TOP_UNIVPLL2_D4 30 macro
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/linux-6.6.21/arch/arm/boot/dts/mediatek/ |
D | mt7629.dtsi | 253 <&topckgen CLK_TOP_UNIVPLL2_D4>; 323 <&topckgen CLK_TOP_UNIVPLL2_D4>, 390 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>,
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/linux-6.6.21/arch/arm64/boot/dts/mediatek/ |
D | mt2712e.dtsi | 555 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>, 634 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>, 647 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>, 660 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>, 673 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
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D | mt8365.dtsi | 481 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
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/linux-6.6.21/drivers/clk/mediatek/ |
D | clk-mt6795-topckgen.c | 432 FACTOR_FLAGS(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univ_416m", 1, 4, 0),
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D | clk-mt8173-topckgen.c | 511 FACTOR_FLAGS(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univ_416m", 1, 4, 0),
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D | clk-mt7622.c | 291 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll", 1, 12),
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D | clk-mt8135.c | 70 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll_416m", 1, 4),
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D | clk-mt7629.c | 398 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll", 1, 12),
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D | clk-mt6797.c | 53 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll", 1, 4),
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D | clk-mt2712.c | 70 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll_d3", 1, 4),
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D | clk-mt8365.c | 56 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll", 1, 12),
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D | clk-mt6765.c | 112 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll_d3", 1, 4),
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D | clk-mt2701.c | 88 FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll_d3", 1, 4),
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