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Searched refs:BCS0 (Results 1 – 16 of 16) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/i915/
Di915_pci.c271 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
319 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
387 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
395 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
454 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
461 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
506 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
522 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
569 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
590 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
[all …]
Di915_drv.h723 ENGINE_INSTANCES_MASK(gt, BCS0, I915_MAX_BCS)
Di915_gpu_error.c1301 case BCS0: in engine_record_registers()
/linux-6.6.21/drivers/gpu/drm/i915/gvt/
Dmmio_context.c73 {BCS0, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
74 {BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
75 {BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
76 {BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
77 {BCS0, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
127 {BCS0, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
128 {BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
129 {BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
130 {BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
131 {BCS0, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
[all …]
Dexeclist.c50 [BCS0] = BCS_AS_CONTEXT_SWITCH,
Dcmd_parser.c429 #define R_BCS BIT(BCS0)
619 [BCS0] = {
1052 if (s->engine->id == BCS0 && in cmd_handler_lri()
1157 [BCS0] = {
Dscheduler.c169 } else if (workload->engine->id == BCS0) in populate_shadow_context()
Dhandlers.c334 engine_mask |= BIT(BCS0); in gdrst_mmio_write()
2090 id = BCS0; in gvt_reg_tlb_control_handler()
/linux-6.6.21/drivers/gpu/drm/i915/gt/
Dintel_engine_types.h113 BCS0, enumerator
122 #define _BCS(n) (BCS0 + (n))
Dintel_engine_user.c168 [COPY_ENGINE_CLASS] = { BCS0, 1 }, in legacy_ring_idx()
Dintel_engine_cs.c71 [BCS0] = {
404 [BCS0] = GEN11_GRDOM_BLT, in get_reset_domain()
437 [BCS0] = GEN6_GRDOM_BLT, in get_reset_domain()
1686 [BCS0] = MSG_IDLE_BCS, in __cs_pending_mi_force_wakes()
Dintel_mocs.c641 [BCS0] = __GEN9_BCS0_MOCS0, in mocs_offset()
Dgen8_engine_cs.c173 case BCS0: in gen12_get_aux_inv_reg()
Dintel_ring_submission.c96 case BCS0: in set_hwsp()
Dintel_execlists_submission.c3506 [BCS0] = GEN8_BCS_IRQ_SHIFT, in logical_ring_default_irqs()
/linux-6.6.21/drivers/gpu/drm/i915/gem/
Di915_gem_execbuffer.c2481 [I915_EXEC_BLT] = BCS0,