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Searched refs:via_write_reg_mask (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/video/fbdev/via/
Dvia_modesetting.c36 via_write_reg_mask(VIACR, 0x11, 0x00, 0x80); in via_set_primary_timing()
41 via_write_reg_mask(VIACR, 0x03, raw.hor_blank_end & 0x1F, 0x1F); in via_set_primary_timing()
43 via_write_reg_mask(VIACR, 0x05, (raw.hor_sync_end & 0x1F) in via_set_primary_timing()
46 via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01) in via_set_primary_timing()
53 via_write_reg_mask(VIACR, 0x09, raw.ver_blank_start >> (9 - 5) & 0x20, in via_set_primary_timing()
56 via_write_reg_mask(VIACR, 0x11, raw.ver_sync_end & 0x0F, 0x0F); in via_set_primary_timing()
60 via_write_reg_mask(VIACR, 0x33, (raw.hor_sync_start >> (8 - 4) & 0x10) in via_set_primary_timing()
62 via_write_reg_mask(VIACR, 0x35, (raw.ver_total >> 10 & 0x01) in via_set_primary_timing()
66 via_write_reg_mask(VIACR, 0x36, raw.hor_total >> (8 - 3) & 0x08, 0x08); in via_set_primary_timing()
69 via_write_reg_mask(VIACR, 0x11, 0x80, 0x80); in via_set_primary_timing()
[all …]
Dvia_clock.c44 via_write_reg_mask(VIASR, 0x40, 0x02, 0x02); /* enable reset */ in cle266_set_primary_pll_encoded()
47 via_write_reg_mask(VIASR, 0x40, 0x00, 0x02); /* disable reset */ in cle266_set_primary_pll_encoded()
52 via_write_reg_mask(VIASR, 0x40, 0x02, 0x02); /* enable reset */ in k800_set_primary_pll_encoded()
56 via_write_reg_mask(VIASR, 0x40, 0x00, 0x02); /* disable reset */ in k800_set_primary_pll_encoded()
61 via_write_reg_mask(VIASR, 0x40, 0x04, 0x04); /* enable reset */ in cle266_set_secondary_pll_encoded()
64 via_write_reg_mask(VIASR, 0x40, 0x00, 0x04); /* disable reset */ in cle266_set_secondary_pll_encoded()
69 via_write_reg_mask(VIASR, 0x40, 0x04, 0x04); /* enable reset */ in k800_set_secondary_pll_encoded()
73 via_write_reg_mask(VIASR, 0x40, 0x00, 0x04); /* disable reset */ in k800_set_secondary_pll_encoded()
78 via_write_reg_mask(VIASR, 0x40, 0x01, 0x01); /* enable reset */ in set_engine_pll_encoded()
82 via_write_reg_mask(VIASR, 0x40, 0x00, 0x01); /* disable reset */ in set_engine_pll_encoded()
[all …]
Ddvi.c403 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
416 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
438 via_write_reg_mask(VIACR, CR97, 0x03, 0x03); in viafb_dvi_enable()
440 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
448 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
Dvia-gpio.c122 via_write_reg_mask(VIASR, gpio->vg_port_index, 0, in via_gpio_dir_input()
162 via_write_reg_mask(VIASR, gpio->vg_port_index, 0x02, 0x02); in viafb_gpio_enable()
167 via_write_reg_mask(VIASR, gpio->vg_port_index, 0, 0x02); in viafb_gpio_disable()
Dhw.c694 via_write_reg_mask(VIACR, index, value, mask); in set_source_common()
713 via_write_reg_mask(VIASR, 0x16, value, 0x40); in set_crt_source()
785 via_write_reg_mask(VIACR, 0x36, value, 0x30); in set_crt_state()
803 via_write_reg_mask(VIASR, 0x1E, value, 0xC0); in set_dvp0_state()
821 via_write_reg_mask(VIASR, 0x1E, value, 0x30); in set_dvp1_state()
839 via_write_reg_mask(VIASR, 0x2A, value, 0x03); in set_lvds1_state()
857 via_write_reg_mask(VIASR, 0x2A, value, 0x0C); in set_lvds2_state()
890 via_write_reg_mask(VIACR, 0x9B, polarity << 5, 0x60); in via_set_sync_polarity()
892 via_write_reg_mask(VIACR, 0x99, polarity << 5, 0x60); in via_set_sync_polarity()
894 via_write_reg_mask(VIACR, 0x97, polarity << 5, 0x60); in via_set_sync_polarity()
[all …]
Dvia_i2c.c57 via_write_reg_mask(adap_data->io_port, adap_data->ioport_index, in via_i2c_getscl()
73 via_write_reg_mask(adap_data->io_port, adap_data->ioport_index, in via_i2c_getsda()
Dhw.h19 #define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m)
Dlcd.c560 via_write_reg_mask(VIACR, 0x79, 0x00, in viafb_lcd_set_mode()
/linux-6.1.9/include/linux/
Dvia-core.h200 static inline void via_write_reg_mask(u16 port, u8 index, u8 data, u8 mask) in via_write_reg_mask() function
/linux-6.1.9/drivers/media/platform/via/
Dvia-camera.c1050 via_write_reg_mask(VIASR, 0x78, 0, 0x80); in viacam_resume()
1051 via_write_reg_mask(VIASR, 0x1e, 0xc0, 0xc0); in viacam_resume()
1216 via_write_reg_mask(VIASR, 0x78, 0, 0x80); in viacam_probe()
1217 via_write_reg_mask(VIASR, 0x1e, 0xc0, 0xc0); in viacam_probe()