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Searched refs:umc (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Damdgpu_umc.c38 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
39 adev->umc.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_umc_do_page_retirement()
40 adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, ras_error_status); in amdgpu_umc_do_page_retirement()
42 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
43 adev->umc.ras->ras_block.hw_ops->query_ras_error_address && in amdgpu_umc_do_page_retirement()
44 adev->umc.max_ras_err_cnt_per_query) { in amdgpu_umc_do_page_retirement()
46 kcalloc(adev->umc.max_ras_err_cnt_per_query, in amdgpu_umc_do_page_retirement()
59 adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, ras_error_status); in amdgpu_umc_do_page_retirement()
62 if (adev->umc.ras && in amdgpu_umc_do_page_retirement()
63 adev->umc.ras->ecc_info_query_ras_error_count) in amdgpu_umc_do_page_retirement()
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Dgmc_v11_0.c549 adev->umc.channel_inst_num = UMC_V8_10_CHANNEL_INSTANCE_NUM; in gmc_v11_0_set_umc_funcs()
550 adev->umc.umc_inst_num = UMC_V8_10_UMC_INSTANCE_NUM; in gmc_v11_0_set_umc_funcs()
551 adev->umc.node_inst_num = adev->gmc.num_umc; in gmc_v11_0_set_umc_funcs()
552 adev->umc.max_ras_err_cnt_per_query = UMC_V8_10_TOTAL_CHANNEL_NUM(adev); in gmc_v11_0_set_umc_funcs()
553 adev->umc.channel_offs = UMC_V8_10_PER_CHANNEL_OFFSET; in gmc_v11_0_set_umc_funcs()
554 adev->umc.channel_idx_tbl = &umc_v8_10_channel_idx_tbl[0][0][0]; in gmc_v11_0_set_umc_funcs()
555 adev->umc.ras = &umc_v8_10_ras; in gmc_v11_0_set_umc_funcs()
563 if (adev->umc.ras) { in gmc_v11_0_set_umc_funcs()
564 amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block); in gmc_v11_0_set_umc_funcs()
566 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in gmc_v11_0_set_umc_funcs()
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Dgmc_v9_0.c1203 adev->umc.funcs = &umc_v6_0_funcs; in gmc_v9_0_set_umc_funcs()
1206 adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM; in gmc_v9_0_set_umc_funcs()
1207 adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM; in gmc_v9_0_set_umc_funcs()
1208 adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM; in gmc_v9_0_set_umc_funcs()
1209 adev->umc.channel_offs = UMC_V6_1_PER_CHANNEL_OFFSET_VG20; in gmc_v9_0_set_umc_funcs()
1210 adev->umc.channel_idx_tbl = &umc_v6_1_channel_idx_tbl[0][0]; in gmc_v9_0_set_umc_funcs()
1211 adev->umc.ras = &umc_v6_1_ras; in gmc_v9_0_set_umc_funcs()
1214 adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM; in gmc_v9_0_set_umc_funcs()
1215 adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM; in gmc_v9_0_set_umc_funcs()
1216 adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM; in gmc_v9_0_set_umc_funcs()
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Dumc_v6_7.c50 uint32_t index = umc_inst * adev->umc.channel_inst_num + ch_inst; in get_umc_v6_7_reg_offset()
57 return adev->umc.channel_offs * ch_inst + UMC_V6_7_INST_DIST * umc_inst; in get_umc_v6_7_reg_offset()
64 return adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in get_umc_v6_7_channel_index()
113 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_query_correctable_error_count()
126 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_ecc_info_query_correctable_error_count()
155 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
198 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_convert_error_address()
234 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_query_error_address()
332 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_query_correctable_error_count()
Dgmc_v10_0.c676 adev->umc.max_ras_err_cnt_per_query = UMC_V8_7_TOTAL_CHANNEL_NUM; in gmc_v10_0_set_umc_funcs()
677 adev->umc.channel_inst_num = UMC_V8_7_CHANNEL_INSTANCE_NUM; in gmc_v10_0_set_umc_funcs()
678 adev->umc.umc_inst_num = UMC_V8_7_UMC_INSTANCE_NUM; in gmc_v10_0_set_umc_funcs()
679 adev->umc.channel_offs = UMC_V8_7_PER_CHANNEL_OFFSET_SIENNA; in gmc_v10_0_set_umc_funcs()
680 adev->umc.channel_idx_tbl = &umc_v8_7_channel_idx_tbl[0][0]; in gmc_v10_0_set_umc_funcs()
681 adev->umc.ras = &umc_v8_7_ras; in gmc_v10_0_set_umc_funcs()
686 if (adev->umc.ras) { in gmc_v10_0_set_umc_funcs()
687 amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block); in gmc_v10_0_set_umc_funcs()
689 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in gmc_v10_0_set_umc_funcs()
690 adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC; in gmc_v10_0_set_umc_funcs()
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Damdgpu_umc.h40 #define LOOP_UMC_INST(umc_inst) for ((umc_inst) = 0; (umc_inst) < adev->umc.umc_inst_num; (umc_inst…
41 #define LOOP_UMC_CH_INST(ch_inst) for ((ch_inst) = 0; (ch_inst) < adev->umc.channel_inst_num; (ch_i…
45 for ((node_inst) = 0; (node_inst) < adev->umc.node_inst_num; (node_inst)++)
Dumc_v8_10.c65 return adev->umc.channel_offs * ch_inst + UMC_8_INST_DIST * umc_inst + in get_umc_v8_10_reg_offset()
230 adev->umc.channel_idx_tbl[node_inst * adev->umc.umc_inst_num * in umc_v8_10_query_error_address()
231 adev->umc.channel_inst_num + in umc_v8_10_query_error_address()
232 umc_inst * adev->umc.channel_inst_num + in umc_v8_10_query_error_address()
Dumc_v8_7.c47 return adev->umc.channel_offs*ch_inst + UMC_8_INST_DIST*umc_inst; in get_umc_v8_7_reg_offset()
58 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_query_correctable_error_count()
77 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
119 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v8_7_convert_error_address()
139 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_query_error_address()
Damdgpu_ras.c946 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_ras_get_ecc_info()
947 adev->umc.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_ras_get_ecc_info()
948 adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, err_data); in amdgpu_ras_get_ecc_info()
953 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_ras_get_ecc_info()
954 adev->umc.ras->ras_block.hw_ops->query_ras_error_address) in amdgpu_ras_get_ecc_info()
955 adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, err_data); in amdgpu_ras_get_ecc_info()
957 if (adev->umc.ras && in amdgpu_ras_get_ecc_info()
958 adev->umc.ras->ecc_info_query_ras_error_count) in amdgpu_ras_get_ecc_info()
959 adev->umc.ras->ecc_info_query_ras_error_count(adev, err_data); in amdgpu_ras_get_ecc_info()
961 if (adev->umc.ras && in amdgpu_ras_get_ecc_info()
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Dumc_v8_10.h36 (UMC_V8_10_CHANNEL_INSTANCE_NUM * UMC_V8_10_UMC_INSTANCE_NUM * (adev)->umc.node_inst_num)
Dumc_v6_1.c91 return adev->umc.channel_offs*ch_inst + UMC_6_INST_DIST*umc_inst; in get_umc_6_reg_offset()
303 …uint32_t channel_index = adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst… in umc_v6_1_query_error_address()
Damdgpu.h949 struct amdgpu_umc umc; member
/linux-6.1.9/drivers/edac/
Damd64_edac.c232 if (pvt->umc) { in __set_scrub_rate()
274 if (pvt->umc) { in get_scrub_rate()
1076 static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) in umc_normaddr_to_sysaddr() argument
1096 ctx.inst_id = umc; in umc_normaddr_to_sysaddr()
1099 if (df_indirect_read_instance(nid, 0, 0x1B4, umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1113 if (df_indirect_read_instance(nid, 0, 0x110 + (8 * base), umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1136 if (df_indirect_read_instance(nid, 0, 0x114 + (8 * base), umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1192 if (df_indirect_read_instance(nid, 0, 0x50, umc, &ctx.tmp)) in umc_normaddr_to_sysaddr()
1292 if (pvt->umc) { in determine_edac_cap()
1296 if (!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT)) in determine_edac_cap()
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Damd64_edac.h408 struct amd64_umc *umc; /* UMC registers */ member
/linux-6.1.9/Documentation/ABI/testing/
Dsysfs-bus-umc1 What: /sys/bus/umc/
11 The umc bus presents each of the individual
14 What: /sys/bus/umc/devices/.../capability_id
22 What: /sys/bus/umc/devices/.../version
/linux-6.1.9/arch/x86/kernel/cpu/
DMakefile45 obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
/linux-6.1.9/drivers/scsi/
Dmegaraid.c3504 megacmd_t __user *umc; in mega_n_to_m() local
3524 umc = MBOX_P(uiocp); in mega_n_to_m()
3526 if (get_user(upthru, (mega_passthru __user * __user *)&umc->xferaddr)) in mega_n_to_m()
3541 umc = (megacmd_t __user *)uioc_mimd->mbox; in mega_n_to_m()
3543 if (get_user(upthru, (mega_passthru __user * __user *)&umc->xferaddr)) in mega_n_to_m()