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Searched refs:tWB_max (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/drivers/mtd/nand/raw/
Dnand_timings.c60 .tWB_max = 200000,
105 .tWB_max = 100000,
149 .tWB_max = 100000,
195 .tWB_max = 100000,
240 .tWB_max = 100000,
285 .tWB_max = 100000,
332 .tWB_max = 100000,
374 .tWB_max = 100000,
416 .tWB_max = 100000,
458 .tWB_max = 100000,
[all …]
Dnand_base.c662 ndelay(NAND_COMMON_TIMING_NS(conf, tWB_max)); in nand_soft_waitrdy()
1141 NAND_OP_ADDR(3, addrs, NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_sp_exec_read_page_op()
1184 NAND_OP_CMD(NAND_CMD_READSTART, NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_lp_exec_read_page_op()
1280 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_read_param_page_op()
1421 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_exec_prog_page_op()
1525 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_prog_page_end_op()
1842 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_erase_op()
1903 tWB_max)), in nand_set_features_op()
1950 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_get_features_op()
2020 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_reset_op()
Dstm32_fmc2_nand.c1287 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in stm32_fmc2_nfc_waitrdy()
1503 if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) && in stm32_fmc2_nfc_calc_timings()
1504 (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1505 thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem; in stm32_fmc2_nfc_calc_timings()
Dsunxi_nand.c1476 if (timings->tWB_max > (min_clk_period * 20)) in sunxi_nfc_setup_interface()
1477 min_clk_period = DIV_ROUND_UP(timings->tWB_max, 20); in sunxi_nfc_setup_interface()
1502 tWB = sunxi_nand_lookup_timing(tWB_lut, timings->tWB_max, in sunxi_nfc_setup_interface()
Drenesas-nand-controller.c919 TIM_SEQ1_TWB(TO_CYCLES64(sdr->tWB_max, period_ns)) | in rnandc_setup_interface()
926 bef_dly = sdr->tWB_max - sdr->tDH_min; in rnandc_setup_interface()
Dtegra_nand.c805 reg |= TIMING_TWB(OFFSET(DIV_ROUND_UP(timings->tWB_max, period), 1)); in tegra_nand_setup_timing()
Dmarvell_nand.c2414 nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns); in marvell_nfc_setup_interface()
2416 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, in marvell_nfc_setup_interface()
Dmeson_nand.c1126 meson_chip->twb = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tWB_max), in meson_nfc_setup_interface()
Dcadence-nand-controller.c2491 twb_cnt = calc_cycl((sdr->tWB_max + board_delay), clk_period); in cadence_nand_setup_interface()
/linux-6.1.9/include/linux/mtd/
Drawnand.h467 u32 tWB_max; member
555 u32 tWB_max; member
/linux-6.1.9/drivers/mtd/nand/raw/atmel/
Dnand-controller.c1448 ncycles = DIV_ROUND_UP(conf->timings.sdr.tWB_max, mckperiodps); in atmel_smc_nand_prepare_smcconf()