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Searched refs:rlc (Results 1 – 25 of 26) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Damdgpu_rlc.c39 if (adev->gfx.rlc.in_safe_mode) in amdgpu_gfx_rlc_enter_safe_mode()
43 if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) in amdgpu_gfx_rlc_enter_safe_mode()
49 adev->gfx.rlc.funcs->set_safe_mode(adev); in amdgpu_gfx_rlc_enter_safe_mode()
50 adev->gfx.rlc.in_safe_mode = true; in amdgpu_gfx_rlc_enter_safe_mode()
63 if (!(adev->gfx.rlc.in_safe_mode)) in amdgpu_gfx_rlc_exit_safe_mode()
67 if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) in amdgpu_gfx_rlc_exit_safe_mode()
73 adev->gfx.rlc.funcs->unset_safe_mode(adev); in amdgpu_gfx_rlc_exit_safe_mode()
74 adev->gfx.rlc.in_safe_mode = false; in amdgpu_gfx_rlc_exit_safe_mode()
97 &adev->gfx.rlc.save_restore_obj, in amdgpu_gfx_rlc_init_sr()
98 &adev->gfx.rlc.save_restore_gpu_addr, in amdgpu_gfx_rlc_init_sr()
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Damdgpu_ucode.c801 ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; in amdgpu_ucode_init_single_fw()
802 ucode_addr = adev->gfx.rlc.save_restore_list_cntl; in amdgpu_ucode_init_single_fw()
805 ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; in amdgpu_ucode_init_single_fw()
806 ucode_addr = adev->gfx.rlc.save_restore_list_gpm; in amdgpu_ucode_init_single_fw()
809 ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes; in amdgpu_ucode_init_single_fw()
810 ucode_addr = adev->gfx.rlc.save_restore_list_srm; in amdgpu_ucode_init_single_fw()
813 ucode->ucode_size = adev->gfx.rlc.rlc_iram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
814 ucode_addr = adev->gfx.rlc.rlc_iram_ucode; in amdgpu_ucode_init_single_fw()
817 ucode->ucode_size = adev->gfx.rlc.rlc_dram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
818 ucode_addr = adev->gfx.rlc.rlc_dram_ucode; in amdgpu_ucode_init_single_fw()
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Dgfx_v7_0.c2520 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v7_0_cp_gfx_start()
3271 adev->gfx.rlc.reg_list = spectre_rlc_save_restore_register_list; in gfx_v7_0_rlc_init()
3272 adev->gfx.rlc.reg_list_size = in gfx_v7_0_rlc_init()
3275 adev->gfx.rlc.reg_list = kalindi_rlc_save_restore_register_list; in gfx_v7_0_rlc_init()
3276 adev->gfx.rlc.reg_list_size = in gfx_v7_0_rlc_init()
3280 adev->gfx.rlc.cs_data = ci_cs_data; in gfx_v7_0_rlc_init()
3281 adev->gfx.rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */ in gfx_v7_0_rlc_init()
3282 adev->gfx.rlc.cp_table_size += 64 * 1024; /* GDS */ in gfx_v7_0_rlc_init()
3284 src_ptr = adev->gfx.rlc.reg_list; in gfx_v7_0_rlc_init()
3285 dws = adev->gfx.rlc.reg_list_size; in gfx_v7_0_rlc_init()
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Dgfx_v6_0.c2034 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v6_0_cp_gfx_start()
2356 adev->gfx.rlc.reg_list = verde_rlc_save_restore_register_list; in gfx_v6_0_rlc_init()
2357 adev->gfx.rlc.reg_list_size = in gfx_v6_0_rlc_init()
2360 adev->gfx.rlc.cs_data = si_cs_data; in gfx_v6_0_rlc_init()
2361 src_ptr = adev->gfx.rlc.reg_list; in gfx_v6_0_rlc_init()
2362 dws = adev->gfx.rlc.reg_list_size; in gfx_v6_0_rlc_init()
2363 cs_data = adev->gfx.rlc.cs_data; in gfx_v6_0_rlc_init()
2374 adev->gfx.rlc.clear_state_size = gfx_v6_0_get_csb_size(adev); in gfx_v6_0_rlc_init()
2375 dws = adev->gfx.rlc.clear_state_size + (256 / 4); in gfx_v6_0_rlc_init()
2379 &adev->gfx.rlc.clear_state_obj, in gfx_v6_0_rlc_init()
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Dsoc15_common.h31 ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.rlcg_reg_access_supported) ? \
36 ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.rlcg_reg_access_supported) ? \
Dgfx_v8_0.c942 kfree(adev->gfx.rlc.register_list_format); in gfx_v8_0_free_microcode()
1071 adev->gfx.rlc.save_and_restore_offset = in gfx_v8_0_init_microcode()
1073 adev->gfx.rlc.clear_state_descriptor_offset = in gfx_v8_0_init_microcode()
1075 adev->gfx.rlc.avail_scratch_ram_locations = in gfx_v8_0_init_microcode()
1077 adev->gfx.rlc.reg_restore_list_size = in gfx_v8_0_init_microcode()
1079 adev->gfx.rlc.reg_list_format_start = in gfx_v8_0_init_microcode()
1081 adev->gfx.rlc.reg_list_format_separate_start = in gfx_v8_0_init_microcode()
1083 adev->gfx.rlc.starting_offsets_start = in gfx_v8_0_init_microcode()
1085 adev->gfx.rlc.reg_list_format_size_bytes = in gfx_v8_0_init_microcode()
1087 adev->gfx.rlc.reg_list_size_bytes = in gfx_v8_0_init_microcode()
[all …]
Dgfx_v9_0.c1091 kfree(adev->gfx.rlc.register_list_format); in gfx_v9_0_free_microcode()
1231 !adev->gfx.rlc.is_rlc_v2_1)) in gfx_v9_0_check_if_need_gfxoff()
1512 if (adev->gfx.rlc.cs_data == NULL) in gfx_v9_0_get_csb_buffer()
1524 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v9_0_get_csb_buffer()
1705 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl; in gfx_v9_0_init_rlcg_reg_access_ctrl()
1713 adev->gfx.rlc.rlcg_reg_access_supported = true; in gfx_v9_0_init_rlcg_reg_access_ctrl()
1721 adev->gfx.rlc.cs_data = gfx9_cs_data; in gfx_v9_0_rlc_init()
1723 cs_data = adev->gfx.rlc.cs_data; in gfx_v9_0_rlc_init()
1734 adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */ in gfx_v9_0_rlc_init()
1753 if (adev->gfx.rlc.funcs->update_spm_vmid) in gfx_v9_0_rlc_init()
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Dgfx_v11_0.c443 kfree(adev->gfx.rlc.register_list_format); in gfx_v11_0_free_microcode()
619 if (adev->gfx.rlc.cs_data == NULL) in gfx_v11_0_get_csb_buffer()
631 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v11_0_get_csb_buffer()
662 amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, in gfx_v11_0_rlc_fini()
663 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v11_0_rlc_fini()
664 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v11_0_rlc_fini()
667 amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, in gfx_v11_0_rlc_fini()
668 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v11_0_rlc_fini()
669 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v11_0_rlc_fini()
676 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl; in gfx_v11_0_init_rlcg_reg_access_ctrl()
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Dgfx_v10_0.c3907 kfree(adev->gfx.rlc.register_list_format); in gfx_v10_0_free_microcode()
4166 if (adev->gfx.rlc.cs_data == NULL) in gfx_v10_0_get_csb_buffer()
4178 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v10_0_get_csb_buffer()
4209 amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, in gfx_v10_0_rlc_fini()
4210 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v10_0_rlc_fini()
4211 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v10_0_rlc_fini()
4214 amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, in gfx_v10_0_rlc_fini()
4215 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v10_0_rlc_fini()
4216 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v10_0_rlc_fini()
4223 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl; in gfx_v10_0_init_rlcg_reg_access_ctrl()
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Daldebaran.c272 adev->gfx.rlc.funcs->resume(adev); in aldebaran_mode2_restore_ip()
Damdgpu_gfx.h275 struct amdgpu_rlc rlc; member
Damdgpu_ucode.h393 struct rlc_firmware_header_v1_0 rlc; member
Damdgpu_virt.c949 if (!adev->gfx.rlc.rlcg_reg_access_supported) { in amdgpu_virt_rlcg_reg_rw()
955 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl; in amdgpu_virt_rlcg_reg_rw()
Damdgpu_vm.c520 if (update_spm_vmid_needed && adev->gfx.rlc.funcs->update_spm_vmid) in amdgpu_vm_flush()
521 adev->gfx.rlc.funcs->update_spm_vmid(adev, job->vmid); in amdgpu_vm_flush()
Damdgpu_device.c573 adev->gfx.rlc.funcs && in amdgpu_mm_wreg_mmio_rlc()
574 adev->gfx.rlc.funcs->is_rlcg_access_range) { in amdgpu_mm_wreg_mmio_rlc()
575 if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg)) in amdgpu_mm_wreg_mmio_rlc()
/linux-6.1.9/drivers/gpu/drm/radeon/
Devergreen.c4117 if (rdev->rlc.save_restore_obj) { in sumo_rlc_fini()
4118 r = radeon_bo_reserve(rdev->rlc.save_restore_obj, false); in sumo_rlc_fini()
4121 radeon_bo_unpin(rdev->rlc.save_restore_obj); in sumo_rlc_fini()
4122 radeon_bo_unreserve(rdev->rlc.save_restore_obj); in sumo_rlc_fini()
4124 radeon_bo_unref(&rdev->rlc.save_restore_obj); in sumo_rlc_fini()
4125 rdev->rlc.save_restore_obj = NULL; in sumo_rlc_fini()
4129 if (rdev->rlc.clear_state_obj) { in sumo_rlc_fini()
4130 r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false); in sumo_rlc_fini()
4133 radeon_bo_unpin(rdev->rlc.clear_state_obj); in sumo_rlc_fini()
4134 radeon_bo_unreserve(rdev->rlc.clear_state_obj); in sumo_rlc_fini()
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Dradeon_ucode.h215 struct rlc_firmware_header_v1_0 rlc; member
Dcik.c5806 static void cik_update_rlc(struct radeon_device *rdev, u32 rlc) in cik_update_rlc() argument
5811 if (tmp != rlc) in cik_update_rlc()
5812 WREG32(RLC_CNTL, rlc); in cik_update_rlc()
6420 if (rdev->rlc.cp_table_ptr == NULL) in cik_init_cp_pg_table()
6424 dst_ptr = rdev->rlc.cp_table_ptr; in cik_init_cp_pg_table()
6616 if (rdev->rlc.cs_data) { in cik_init_gfx_cgpg()
6618 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()
6619 WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()
6620 WREG32(RLC_GPM_SCRATCH_DATA, rdev->rlc.clear_state_size); in cik_init_gfx_cgpg()
6626 if (rdev->rlc.reg_list) { in cik_init_gfx_cgpg()
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Dsi.c5216 static void si_update_rlc(struct radeon_device *rdev, u32 rlc) in si_update_rlc() argument
5221 if (tmp != rlc) in si_update_rlc()
5222 WREG32(RLC_CNTL, rlc); in si_update_rlc()
5278 WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); in si_init_gfx_cgpg()
5284 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_gfx_cgpg()
5684 if (rdev->rlc.cs_data == NULL) in si_get_csb_size()
5692 for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { in si_get_csb_size()
5716 if (rdev->rlc.cs_data == NULL) in si_get_csb_buffer()
5728 for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { in si_get_csb_buffer()
5780 WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); in si_init_pg()
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Dni.c2177 rdev->rlc.reg_list = tn_rlc_save_restore_register_list; in cayman_startup()
2178 rdev->rlc.reg_list_size = in cayman_startup()
2180 rdev->rlc.cs_data = cayman_cs_data; in cayman_startup()
/linux-6.1.9/drivers/net/wireless/intel/iwlwifi/fw/api/
Ddatapath.h268 struct iwl_rlc_properties rlc; member
/linux-6.1.9/arch/arc/lib/
Dstrcmp.S77 rlc r0,0 ; r0 := r2 > r3 ? 1 : 0
/linux-6.1.9/drivers/net/wireless/intel/iwlwifi/mvm/
Dphy-ctxt.c189 iwl_mvm_phy_ctxt_set_rxchain(mvm, ctxt, &cmd.rlc.rx_chain_info, in iwl_mvm_phy_send_rlc()
/linux-6.1.9/drivers/media/test-drivers/vicodec/
Dcodec-fwht.c55 rlc(const s16 *in, __be16 *output, int blocktype) in rlc() function
732 size = rlc(cf->coeffs, *rlco, blocktype); in encode_plane()
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/
Damdgpu_smu.c1520 adev->gfx.rlc.funcs->stop) in smu_disable_dpms()
1521 adev->gfx.rlc.funcs->stop(adev); in smu_disable_dpms()

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