39 	if (adev->gfx.rlc.in_safe_mode)  in amdgpu_gfx_rlc_enter_safe_mode()
43 	if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev))  in amdgpu_gfx_rlc_enter_safe_mode()
49 		adev->gfx.rlc.funcs->set_safe_mode(adev);  in amdgpu_gfx_rlc_enter_safe_mode()
50 		adev->gfx.rlc.in_safe_mode = true;  in amdgpu_gfx_rlc_enter_safe_mode()
63 	if (!(adev->gfx.rlc.in_safe_mode))  in amdgpu_gfx_rlc_exit_safe_mode()
67 	if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev))  in amdgpu_gfx_rlc_exit_safe_mode()
73 		adev->gfx.rlc.funcs->unset_safe_mode(adev);  in amdgpu_gfx_rlc_exit_safe_mode()
74 		adev->gfx.rlc.in_safe_mode = false;  in amdgpu_gfx_rlc_exit_safe_mode()
97 				      &adev->gfx.rlc.save_restore_obj,  in amdgpu_gfx_rlc_init_sr()
98 				      &adev->gfx.rlc.save_restore_gpu_addr,  in amdgpu_gfx_rlc_init_sr()
99 				      (void **)&adev->gfx.rlc.sr_ptr);  in amdgpu_gfx_rlc_init_sr()
107 	src_ptr = adev->gfx.rlc.reg_list;  in amdgpu_gfx_rlc_init_sr()
108 	dst_ptr = adev->gfx.rlc.sr_ptr;  in amdgpu_gfx_rlc_init_sr()
109 	for (i = 0; i < adev->gfx.rlc.reg_list_size; i++)  in amdgpu_gfx_rlc_init_sr()
111 	amdgpu_bo_kunmap(adev->gfx.rlc.save_restore_obj);  in amdgpu_gfx_rlc_init_sr()
112 	amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);  in amdgpu_gfx_rlc_init_sr()
131 	adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev);  in amdgpu_gfx_rlc_init_csb()
134 				      &adev->gfx.rlc.clear_state_obj,  in amdgpu_gfx_rlc_init_csb()
135 				      &adev->gfx.rlc.clear_state_gpu_addr,  in amdgpu_gfx_rlc_init_csb()
136 				      (void **)&adev->gfx.rlc.cs_ptr);  in amdgpu_gfx_rlc_init_csb()
158 	r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size,  in amdgpu_gfx_rlc_init_cpt()
160 				      &adev->gfx.rlc.cp_table_obj,  in amdgpu_gfx_rlc_init_cpt()
161 				      &adev->gfx.rlc.cp_table_gpu_addr,  in amdgpu_gfx_rlc_init_cpt()
162 				      (void **)&adev->gfx.rlc.cp_table_ptr);  in amdgpu_gfx_rlc_init_cpt()
171 	amdgpu_bo_kunmap(adev->gfx.rlc.cp_table_obj);  in amdgpu_gfx_rlc_init_cpt()
172 	amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);  in amdgpu_gfx_rlc_init_cpt()
192 	max_me = adev->gfx.rlc.funcs->get_cp_table_num(adev);  in amdgpu_gfx_rlc_setup_cp_table()
195 	dst_ptr = adev->gfx.rlc.cp_table_ptr;  in amdgpu_gfx_rlc_setup_cp_table()
259 	if (adev->gfx.rlc.save_restore_obj) {  in amdgpu_gfx_rlc_fini()
260 		amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj,  in amdgpu_gfx_rlc_fini()
261 				      &adev->gfx.rlc.save_restore_gpu_addr,  in amdgpu_gfx_rlc_fini()
262 				      (void **)&adev->gfx.rlc.sr_ptr);  in amdgpu_gfx_rlc_fini()
266 	amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj,  in amdgpu_gfx_rlc_fini()
267 			      &adev->gfx.rlc.clear_state_gpu_addr,  in amdgpu_gfx_rlc_fini()
268 			      (void **)&adev->gfx.rlc.cs_ptr);  in amdgpu_gfx_rlc_fini()
271 	amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj,  in amdgpu_gfx_rlc_fini()
272 			      &adev->gfx.rlc.cp_table_gpu_addr,  in amdgpu_gfx_rlc_fini()
273 			      (void **)&adev->gfx.rlc.cp_table_ptr);  in amdgpu_gfx_rlc_fini()
288 	adev->gfx.rlc.save_and_restore_offset =  in amdgpu_gfx_rlc_init_microcode_v2_0()
290 	adev->gfx.rlc.clear_state_descriptor_offset =  in amdgpu_gfx_rlc_init_microcode_v2_0()
292 	adev->gfx.rlc.avail_scratch_ram_locations =  in amdgpu_gfx_rlc_init_microcode_v2_0()
294 	adev->gfx.rlc.reg_restore_list_size =  in amdgpu_gfx_rlc_init_microcode_v2_0()
296 	adev->gfx.rlc.reg_list_format_start =  in amdgpu_gfx_rlc_init_microcode_v2_0()
298 	adev->gfx.rlc.reg_list_format_separate_start =  in amdgpu_gfx_rlc_init_microcode_v2_0()
300 	adev->gfx.rlc.starting_offsets_start =  in amdgpu_gfx_rlc_init_microcode_v2_0()
302 	adev->gfx.rlc.reg_list_format_size_bytes =  in amdgpu_gfx_rlc_init_microcode_v2_0()
304 	adev->gfx.rlc.reg_list_size_bytes =  in amdgpu_gfx_rlc_init_microcode_v2_0()
306 	adev->gfx.rlc.register_list_format =  in amdgpu_gfx_rlc_init_microcode_v2_0()
307 		kmalloc(adev->gfx.rlc.reg_list_format_size_bytes +  in amdgpu_gfx_rlc_init_microcode_v2_0()
308 			adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL);  in amdgpu_gfx_rlc_init_microcode_v2_0()
309 	if (!adev->gfx.rlc.register_list_format) {  in amdgpu_gfx_rlc_init_microcode_v2_0()
317 		adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]);  in amdgpu_gfx_rlc_init_microcode_v2_0()
319 	adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i;  in amdgpu_gfx_rlc_init_microcode_v2_0()
324 		adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);  in amdgpu_gfx_rlc_init_microcode_v2_0()
348 …adev->gfx.rlc.save_restore_list_cntl_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_cntl_size…  in amdgpu_gfx_rlc_init_microcode_v2_1()
349 …adev->gfx.rlc.save_restore_list_cntl = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_cntl…  in amdgpu_gfx_rlc_init_microcode_v2_1()
352 …adev->gfx.rlc.save_restore_list_gpm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_gpm_size_b…  in amdgpu_gfx_rlc_init_microcode_v2_1()
353 …adev->gfx.rlc.save_restore_list_gpm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_gpm_o…  in amdgpu_gfx_rlc_init_microcode_v2_1()
356 …adev->gfx.rlc.save_restore_list_srm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_srm_size_b…  in amdgpu_gfx_rlc_init_microcode_v2_1()
357 …adev->gfx.rlc.save_restore_list_srm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_srm_o…  in amdgpu_gfx_rlc_init_microcode_v2_1()
358 	adev->gfx.rlc.reg_list_format_direct_reg_list_length =  in amdgpu_gfx_rlc_init_microcode_v2_1()
362 		if (adev->gfx.rlc.save_restore_list_cntl_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_1()
367 				ALIGN(adev->gfx.rlc.save_restore_list_cntl_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_1()
370 		if (adev->gfx.rlc.save_restore_list_gpm_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_1()
375 				ALIGN(adev->gfx.rlc.save_restore_list_gpm_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_1()
378 		if (adev->gfx.rlc.save_restore_list_srm_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_1()
383 				ALIGN(adev->gfx.rlc.save_restore_list_srm_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_1()
394 	adev->gfx.rlc.rlc_iram_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlc_iram_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
395 	adev->gfx.rlc.rlc_iram_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlc_iram_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
396 	adev->gfx.rlc.rlc_dram_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlc_dram_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
397 	adev->gfx.rlc.rlc_dram_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlc_dram_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_2()
400 		if (adev->gfx.rlc.rlc_iram_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_2()
405 				ALIGN(adev->gfx.rlc.rlc_iram_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_2()
408 		if (adev->gfx.rlc.rlc_dram_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_2()
413 				ALIGN(adev->gfx.rlc.rlc_dram_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_2()
426 	adev->gfx.rlc.rlcp_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlcp_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
427 	adev->gfx.rlc.rlcp_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlcp_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
431 	adev->gfx.rlc.rlcv_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlcv_ucode_size_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
432 	adev->gfx.rlc.rlcv_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlcv_ucode_offset_bytes);  in amdgpu_gfx_rlc_init_microcode_v2_3()
435 		if (adev->gfx.rlc.rlcp_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_3()
440 				ALIGN(adev->gfx.rlc.rlcp_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_3()
443 		if (adev->gfx.rlc.rlcv_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_3()
448 				ALIGN(adev->gfx.rlc.rlcv_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_3()
459 …adev->gfx.rlc.global_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->global_tap_delays_ucode_si…  in amdgpu_gfx_rlc_init_microcode_v2_4()
460 …adev->gfx.rlc.global_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->global_tap_delays_uco…  in amdgpu_gfx_rlc_init_microcode_v2_4()
461 …adev->gfx.rlc.se0_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se0_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
462 …adev->gfx.rlc.se0_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se0_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()
463 …adev->gfx.rlc.se1_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se1_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
464 …adev->gfx.rlc.se1_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se1_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()
465 …adev->gfx.rlc.se2_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se2_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
466 …adev->gfx.rlc.se2_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se2_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()
467 …adev->gfx.rlc.se3_tap_delays_ucode_size_bytes = le32_to_cpu(rlc_hdr->se3_tap_delays_ucode_size_byt…  in amdgpu_gfx_rlc_init_microcode_v2_4()
468 …adev->gfx.rlc.se3_tap_delays_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->se3_tap_delays_ucode_off…  in amdgpu_gfx_rlc_init_microcode_v2_4()
471 		if (adev->gfx.rlc.global_tap_delays_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_4()
476 				ALIGN(adev->gfx.rlc.global_tap_delays_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_4()
479 		if (adev->gfx.rlc.se0_tap_delays_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_4()
484 				ALIGN(adev->gfx.rlc.se0_tap_delays_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_4()
487 		if (adev->gfx.rlc.se1_tap_delays_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_4()
492 				ALIGN(adev->gfx.rlc.se1_tap_delays_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_4()
495 		if (adev->gfx.rlc.se2_tap_delays_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_4()
500 				ALIGN(adev->gfx.rlc.se2_tap_delays_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_4()
503 		if (adev->gfx.rlc.se3_tap_delays_ucode_size_bytes) {  in amdgpu_gfx_rlc_init_microcode_v2_4()
508 				ALIGN(adev->gfx.rlc.se3_tap_delays_ucode_size_bytes, PAGE_SIZE);  in amdgpu_gfx_rlc_init_microcode_v2_4()
527 		adev->gfx.rlc.is_rlc_v2_1 = true;  in amdgpu_gfx_rlc_init_microcode()