Searched refs:rCCK0_AFESetting (Results 1 – 9 of 9) sorted by relevance
| /linux-6.1.9/drivers/staging/rtl8192u/ |
| D | r819xU_phyreg.h | 46 #define rCCK0_AFESetting 0xa04 macro
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| D | r8192U_dm.c | 2526 rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_rx_path); in dm_rxpath_sel_byrssi()
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| /linux-6.1.9/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phyreg.h | 96 #define rCCK0_AFESetting 0xa04 macro
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| D | rtl_dm.c | 1933 rtl92e_set_bb_reg(dev, rCCK0_AFESetting, 0x0f000000, in _rtl92e_dm_rx_path_sel_byrssi()
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| /linux-6.1.9/drivers/staging/rtl8712/ |
| D | rtl871x_mp_phy_regdef.h | 155 #define rCCK0_AFESetting 0xa04 /* Disable init gain now */ macro
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| D | rtl871x_mp.c | 478 set_bb_reg(pAdapter, rCCK0_AFESetting, bMaskByte3, cck_ant_sel_val); in r8712_SwitchAntenna()
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| /linux-6.1.9/drivers/staging/r8188eu/include/ |
| D | Hal8188EPhyReg.h | 122 #define rCCK0_AFESetting 0xa04 macro
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| /linux-6.1.9/drivers/staging/rtl8723bs/include/ |
| D | Hal8192CPhyReg.h | 165 #define rCCK0_AFESetting 0xa04 /* Disable init gain now Select RX path by RSSI */ macro
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| /linux-6.1.9/drivers/staging/rtl8723bs/hal/ |
| D | HalPhyRf_8723B.c | 1364 rCCK0_AFESetting in phy_IQCalibrate_8723B()
1394 PHY_SetBBReg(pDM_Odm->Adapter, rCCK0_AFESetting, 0x0f000000, 0xf); in phy_IQCalibrate_8723B()
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