Searched refs:phyreg_def (Results 1 – 16 of 16) sorted by relevance
67 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl8723_phy_rf_serial_read()119 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl8723_phy_rf_serial_write()165 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()166 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()167 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()168 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()170 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()171 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()172 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()173 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()[all …]
73 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92s_phy_rf_serial_read()134 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92s_phy_rf_serial_write()679 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92s_phy_init_register_definition()680 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92s_phy_init_register_definition()681 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92s_phy_init_register_definition()682 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92s_phy_init_register_definition()685 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92s_phy_init_register_definition()686 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92s_phy_init_register_definition()687 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92s_phy_init_register_definition()688 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92s_phy_init_register_definition()[all …]
410 pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl92s_phy_rf6052_config()
76 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf_serial_read()130 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf_serial_write()408 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()409 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()410 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()411 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()413 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()414 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()415 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()416 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()[all …]
151 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf_serial_read()201 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf_serial_write()817 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()818 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()819 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()820 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()822 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()823 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()824 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()825 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()[all …]
420 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf6052_config_parafile()
251 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_read()299 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_write()391 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()393 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()395 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()398 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()401 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()403 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()405 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()407 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()[all …]
517 pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl92d_phy_rf6052_config()
140 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_read()189 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_write()1046 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_def()1047 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_def()1049 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()1050 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()1052 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()1053 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()1055 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in phy_init_bb_rf_register_def()1057 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in phy_init_bb_rf_register_def()[all …]
64 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf6052_config_parafile()
262 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8821ae_phy_rf_serial_write()2163 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_definition()2164 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_definition()2166 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2167 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2169 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2170 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2172 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = RA_LSSIWRITE_8821A; in phy_init_bb_rf_register_definition()2173 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = RB_LSSIWRITE_8821A; in phy_init_bb_rf_register_definition()2175 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RHSSIREAD_8821AE; in phy_init_bb_rf_register_definition()[all …]
425 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8723e_phy_rf6052_config_parafile()
424 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8723be_phy_rf6052_config_parafile()
388 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf6052_config_parafile()
416 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ce_phy_rf6052_config_parafile()
1315 struct bb_reg_def phyreg_def[4]; /*Radio A/B/C/D */ member