/linux-6.1.9/drivers/infiniband/hw/hns/ |
D | hns_roce_mr.c | 422 struct hns_roce_mtr *mtr = &mr->pbl_mtr; in hns_roce_map_mr_sg() local 438 mtr->hem_cfg.region[0].offset = 0; in hns_roce_map_mr_sg() 439 mtr->hem_cfg.region[0].count = mr->npages; in hns_roce_map_mr_sg() 440 mtr->hem_cfg.region[0].hopnum = mr->pbl_hop_num; in hns_roce_map_mr_sg() 441 mtr->hem_cfg.region_count = 1; in hns_roce_map_mr_sg() 442 ret = hns_roce_mtr_map(hr_dev, mtr, mr->page_list, mr->npages); in hns_roce_map_mr_sg() 572 static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, in mtr_map_region() argument 587 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list, in mtr_map_region() 648 static void mtr_free_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) in mtr_free_bufs() argument 651 if (mtr->umem) { in mtr_free_bufs() [all …]
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D | hns_roce_device.h | 405 struct hns_roce_mtr mtr; member 426 struct hns_roce_mtr mtr; member 606 struct hns_roce_mtr mtr; member 700 struct hns_roce_mtr mtr; member 1112 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 1114 int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 1119 struct hns_roce_mtr *mtr); 1120 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
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D | hns_roce_srq.c | 181 ret = hns_roce_mtr_create(hr_dev, &idx_que->mtr, &buf_attr, in alloc_srq_idx() 204 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr); in alloc_srq_idx() 215 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr); in free_srq_idx()
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D | hns_roce_cq.c | 139 ret = hns_roce_mtr_find(hr_dev, &hr_cq->mtr, 0, mtts, ARRAY_SIZE(mtts), in alloc_cqc() 211 ret = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr, in alloc_cq_buf() 222 hns_roce_mtr_destroy(hr_dev, &hr_cq->mtr); in free_cq_buf()
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D | hns_roce_hw_v2.c | 902 return hns_roce_buf_offset(idx_que->mtr.kmem, in get_idx_buf() 3578 return hns_roce_buf_offset(hr_cq->mtr.kmem, n * hr_cq->cqe_size); in get_cqe_v2() 3690 to_hr_hw_page_shift(hr_cq->mtr.hem_cfg.ba_pg_shift)); in hns_roce_v2_write_cqc() 3692 to_hr_hw_page_shift(hr_cq->mtr.hem_cfg.buf_pg_shift)); in hns_roce_v2_write_cqc() 4511 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, hr_qp->rq.offset, mtts, in config_qp_rq_buf() 4548 to_hr_hw_page_shift(hr_qp->mtr.hem_cfg.ba_pg_shift)); in config_qp_rq_buf() 4552 to_hr_hw_page_shift(hr_qp->mtr.hem_cfg.buf_pg_shift)); in config_qp_rq_buf() 4583 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, 0, &sq_cur_blk, 1, NULL); in config_qp_sq_buf() 4590 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, in config_qp_sq_buf() 5679 ret = hns_roce_mtr_find(hr_dev, &idx_que->mtr, 0, mtts_idx, in hns_roce_v2_write_srqc_index_queue() [all …]
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D | hns_roce_qp.c | 803 ret = hns_roce_mtr_create(hr_dev, &hr_qp->mtr, &buf_attr, in alloc_qp_buf() 824 hns_roce_mtr_destroy(hr_dev, &hr_qp->mtr); in free_qp_buf() 1472 return hns_roce_buf_offset(hr_qp->mtr.kmem, offset); in get_wqe()
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/linux-6.1.9/drivers/edac/ |
D | i5400_edac.c | 285 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 10)) argument 286 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 9)) argument 287 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 8)) ? 8 : 4) argument 288 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument 289 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) argument 290 #define MTR_DIMM_RANK(mtr) (((mtr) >> 5) & 0x1) argument 291 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1) argument 292 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument 293 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument 294 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument [all …]
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D | i7300_edac.c | 105 u16 mtr[MAX_SLOTS][MAX_BRANCHES]; /* Memory Technlogy Reg */ member 172 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 8)) argument 173 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 7)) argument 174 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument 175 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 5)) ? 8 : 4) argument 176 #define MTR_DIMM_RANKS(mtr) (((mtr) & (1 << 4)) ? 1 : 0) argument 177 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument 179 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument 180 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument 181 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) argument [all …]
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D | i5000_edac.c | 279 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (0x1 << 8)) argument 280 #define MTR_DRAM_WIDTH(mtr) ((((mtr) >> 6) & 0x1) ? 8 : 4) argument 281 #define MTR_DRAM_BANKS(mtr) ((((mtr) >> 5) & 0x1) ? 8 : 4) argument 282 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) argument 283 #define MTR_DIMM_RANK(mtr) (((mtr) >> 4) & 0x1) argument 284 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1) argument 285 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument 286 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument 287 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument 288 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) argument [all …]
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D | sb_edac.c | 213 #define RANK_DISABLE(mtr) GET_BITFIELD(mtr, 16, 19) argument 214 #define IS_DIMM_PRESENT(mtr) GET_BITFIELD(mtr, 14, 14) argument 215 #define RANK_CNT_BITS(mtr) GET_BITFIELD(mtr, 12, 13) argument 216 #define RANK_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 2, 4) argument 217 #define COL_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 0, 1) argument 331 enum dev_type (*get_width)(struct sbridge_pvt *pvt, u32 mtr); 697 static inline int numrank(enum type type, u32 mtr) in numrank() argument 699 int ranks = (1 << RANK_CNT_BITS(mtr)); in numrank() 707 ranks, max, (unsigned int)RANK_CNT_BITS(mtr), mtr); in numrank() 714 static inline int numrow(u32 mtr) in numrow() argument [all …]
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D | i5100_edac.c | 329 } mtr[I5100_CHANNELS][I5100_MAX_RANKS_PER_CHAN]; member 654 if (!priv->mtr[chan][chan_rank].present) in i5100_npages() 659 priv->mtr[chan][chan_rank].numcol + in i5100_npages() 660 priv->mtr[chan][chan_rank].numrow + in i5100_npages() 661 priv->mtr[chan][chan_rank].numbank; in i5100_npages() 685 priv->mtr[i][j].present = i5100_mtr_present(w); in i5100_init_mtr() 686 priv->mtr[i][j].ethrottle = i5100_mtr_ethrottle(w); in i5100_init_mtr() 687 priv->mtr[i][j].width = 4 + 4 * i5100_mtr_width(w); in i5100_init_mtr() 688 priv->mtr[i][j].numbank = 2 + i5100_mtr_numbank(w); in i5100_init_mtr() 689 priv->mtr[i][j].numrow = 13 + i5100_mtr_numrow(w); in i5100_init_mtr() [all …]
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D | skx_common.c | 223 static int get_width(u32 mtr) in get_width() argument 225 switch (GET_BITFIELD(mtr, 8, 9)) { in get_width() 343 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm, in skx_get_dimm_info() argument 351 ranks = numrank(mtr); in skx_get_dimm_info() 352 rows = numrow(mtr); in skx_get_dimm_info() 353 cols = imc->hbm_mc ? 6 : numcol(mtr); in skx_get_dimm_info() 384 dimm->dtype = get_width(mtr); in skx_get_dimm_info()
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D | i10nm_base.c | 659 u32 mtr, amap, mcddrtcfg; in i10nm_get_dimm_config() local 672 mtr = I10NM_GET_DIMMMTR(imc, i, j); in i10nm_get_dimm_config() 674 mtr, mcddrtcfg, imc->mc, i, j); in i10nm_get_dimm_config() 676 if (IS_DIMM_PRESENT(mtr)) in i10nm_get_dimm_config() 677 ndimms += skx_get_dimm_info(mtr, 0, amap, dimm, in i10nm_get_dimm_config()
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D | skx_base.c | 180 u32 mtr, mcmtr, amap, mcddrtcfg; in skx_get_dimm_config() local 196 0x80 + 4 * j, &mtr); in skx_get_dimm_config() 197 if (IS_DIMM_PRESENT(mtr)) { in skx_get_dimm_config() 198 ndimms += skx_get_dimm_info(mtr, mcmtr, amap, dimm, imc, i, j, cfg); in skx_get_dimm_config()
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D | skx_common.h | 193 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
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/linux-6.1.9/arch/alpha/include/asm/ |
D | core_tsunami.h | 36 tsunami_64 mtr; member
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D | core_titan.h | 37 titan_64 mtr; member
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/linux-6.1.9/arch/alpha/kernel/ |
D | core_tsunami.c | 397 printk("%s: CSR_MTR 0x%lx\n", __func__, TSUNAMI_cchip.mtr.csr); in tsunami_init_arch()
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D | core_titan.c | 373 printk("%s: CSR_MTR 0x%lx\n", __func__, TITAN_cchip->mtr.csr); in titan_init_arch()
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/linux-6.1.9/drivers/net/ethernet/mellanox/mlxsw/ |
D | reg.h | 9344 MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);
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