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Searched refs:mmsys (Results 1 – 25 of 42) sorted by relevance

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/linux-6.1.9/drivers/soc/mediatek/
Dmtk-mmsys.c181 static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys, in mtk_mmsys_find_match_drvdata() argument
187 if (mmsys->io_start == match->drv_data[i]->io_start) in mtk_mmsys_find_match_drvdata()
197 struct mtk_mmsys *mmsys = dev_get_drvdata(dev); in mtk_mmsys_ddp_connect() local
198 const struct mtk_mmsys_routes *routes = mmsys->data->routes; in mtk_mmsys_ddp_connect()
202 for (i = 0; i < mmsys->data->num_routes; i++) in mtk_mmsys_ddp_connect()
204 reg = readl_relaxed(mmsys->regs + routes[i].addr); in mtk_mmsys_ddp_connect()
207 writel_relaxed(reg, mmsys->regs + routes[i].addr); in mtk_mmsys_ddp_connect()
216 struct mtk_mmsys *mmsys = dev_get_drvdata(dev); in mtk_mmsys_ddp_disconnect() local
217 const struct mtk_mmsys_routes *routes = mmsys->data->routes; in mtk_mmsys_ddp_disconnect()
221 for (i = 0; i < mmsys->data->num_routes; i++) in mtk_mmsys_ddp_disconnect()
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mmsys.yaml4 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
7 title: MediaTek mmsys controller
13 The MediaTek mmsys system controller provides clock control, routing control,
14 and miscellaneous control in mmsys partition.
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
27 - mediatek,mt6779-mmsys
28 - mediatek,mt6795-mmsys
29 - mediatek,mt6797-mmsys
[all …]
/linux-6.1.9/arch/arm/boot/dts/
Dmt7623n.dtsi51 mmsys: syscon@14000000 { label
52 compatible = "mediatek,mt7623-mmsys",
53 "mediatek,mt2701-mmsys",
65 clocks = <&mmsys CLK_MM_SMI_LARB0>,
66 <&mmsys CLK_MM_SMI_LARB0>;
133 <&mmsys CLK_MM_SMI_COMMON>,
144 clocks = <&mmsys CLK_MM_DISP_OVL>;
153 clocks = <&mmsys CLK_MM_DISP_RDMA>;
162 clocks = <&mmsys CLK_MM_DISP_WDMA>;
171 clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/media/
Dmediatek-mdp.txt36 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
37 <&mmsys CLK_MM_MUTEX_32K>;
46 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
47 <&mmsys CLK_MM_MUTEX_32K>;
55 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
62 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
69 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
76 clocks = <&mmsys CLK_MM_MDP_WDMA>;
84 clocks = <&mmsys CLK_MM_MDP_WROT0>;
92 clocks = <&mmsys CLK_MM_MDP_WROT1>;
Dmediatek,mdp3-rdma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
90 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
91 <&mmsys CLK_MM_MDP_RSZ1>;
Dmediatek,mdp3-rsz.yaml67 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
76 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
/linux-6.1.9/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi988 mmsys: syscon@14000000 { label
989 compatible = "mediatek,mt8173-mmsys", "syscon";
1005 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
1006 <&mmsys CLK_MM_MUTEX_32K>;
1015 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
1016 <&mmsys CLK_MM_MUTEX_32K>;
1024 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
1031 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
1038 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
1045 clocks = <&mmsys CLK_MM_MDP_WDMA>;
[all …]
Dmt8167.dtsi128 mmsys: mmsys@14000000 { label
129 compatible = "mediatek,mt8167-mmsys", "syscon";
137 clocks = <&mmsys CLK_MM_SMI_COMMON>,
138 <&mmsys CLK_MM_SMI_COMMON>;
147 clocks = <&mmsys CLK_MM_SMI_LARB0>,
148 <&mmsys CLK_MM_SMI_LARB0>;
Dmt8183.dtsi825 <&mmsys CLK_MM_SMI_COMMON>,
826 <&mmsys CLK_MM_SMI_LARB0>,
827 <&mmsys CLK_MM_SMI_LARB1>,
828 <&mmsys CLK_MM_GALS_COMM0>,
829 <&mmsys CLK_MM_GALS_COMM1>,
830 <&mmsys CLK_MM_GALS_CCU2MM>,
831 <&mmsys CLK_MM_GALS_IPU12MM>,
832 <&mmsys CLK_MM_GALS_IMG2MM>,
833 <&mmsys CLK_MM_GALS_CAM2MM>,
834 <&mmsys CLK_MM_GALS_IPU2MM>;
[all …]
Dmt8192.dtsi393 <&mmsys CLK_MM_SMI_INFRA>,
394 <&mmsys CLK_MM_SMI_COMMON>,
395 <&mmsys CLK_MM_SMI_GALS>,
396 <&mmsys CLK_MM_SMI_IOMMU>;
1207 mmsys: syscon@14000000 { label
1208 compatible = "mediatek,mt8192-mmsys", "syscon";
1221 clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
1230 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1231 <&mmsys CLK_MM_SMI_INFRA>,
1232 <&mmsys CLK_MM_SMI_GALS>,
[all …]
Dmt2712e.dtsi994 mmsys: syscon@14000000 { label
995 compatible = "mediatek,mt2712-mmsys", "syscon";
1006 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1007 <&mmsys CLK_MM_SMI_LARB0>;
1015 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1016 <&mmsys CLK_MM_SMI_COMMON>;
1026 clocks = <&mmsys CLK_MM_SMI_LARB4>,
1027 <&mmsys CLK_MM_SMI_LARB4>;
1037 clocks = <&mmsys CLK_MM_SMI_LARB5>,
1038 <&mmsys CLK_MM_SMI_LARB5>;
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,hdmi.yaml103 clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
104 <&mmsys CLK_MM_HDMI_PLLCK>,
105 <&mmsys CLK_MM_HDMI_AUDIO>,
106 <&mmsys CLK_MM_HDMI_SPDIF>;
112 mediatek,syscon-hdmi = <&mmsys 0x900>;
Dmediatek,dsi.yaml101 clocks = <&mmsys CLK_MM_DSI0_MM>,
102 <&mmsys CLK_MM_DSI0_IF>,
105 resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
Dmediatek,od.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
57 clocks = <&mmsys CLK_MM_DISP_OD>;
Dmediatek,split.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
63 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;
Dmediatek,ufoe.yaml19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
66 clocks = <&mmsys CLK_MM_DISP_UFOE>;
Dmediatek,dpi.yaml80 clocks = <&mmsys CLK_MM_DPI_PIXEL>,
81 <&mmsys CLK_MM_DPI_ENGINE>,
Dmediatek,postmask.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
79 clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
Dmediatek,aal.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
86 clocks = <&mmsys CLK_MM_DISP_AAL>;
Dmediatek,ccorr.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
85 clocks = <&mmsys CLK_MM_DISP_CCORR0>;
Dmediatek,gamma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
83 clocks = <&mmsys CLK_MM_DISP_GAMMA>;
Dmediatek,dither.yaml19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
82 clocks = <&mmsys CLK_MM_DISP_DITHER0>;
Dmediatek,wdma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
82 clocks = <&mmsys CLK_MM_DISP_WDMA0>;
/linux-6.1.9/drivers/clk/mediatek/
DKconfig23 bool "Clock driver for MediaTek MT2701 mmsys"
26 This driver supports MediaTek MT2701 mmsys clocks.
103 bool "Clock driver for MediaTek MT2712 mmsys"
106 This driver supports MediaTek MT2712 mmsys clocks.
147 bool "Clock driver for MediaTek MT6765 mmsys"
150 This driver supports MediaTek MT6765 mmsys clocks.
215 tristate "Clock driver for MediaTek MT6779 mmsys"
218 This driver supports MediaTek MT6779 mmsys clocks.
279 tristate "Clock driver for MediaTek MT6795 mmsys"
283 This driver supports MediaTek MT6795 mmsys clocks.
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/pwm/
Dmediatek,pwm-disp.yaml73 clocks = <&mmsys CLK_MM_DISP_PWM026M>,
74 <&mmsys CLK_MM_DISP_PWM0MM>;

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