| /linux-6.1.9/arch/powerpc/kvm/ |
| D | book3s_hv_p9_perf.c | 49 host_os_sprs->mmcr0 = mfspr(SPRN_MMCR0); in switch_pmu_to_guest()
50 host_os_sprs->mmcra = mfspr(SPRN_MMCRA); in switch_pmu_to_guest()
54 host_os_sprs->pmc1 = mfspr(SPRN_PMC1); in switch_pmu_to_guest()
55 host_os_sprs->pmc2 = mfspr(SPRN_PMC2); in switch_pmu_to_guest()
56 host_os_sprs->pmc3 = mfspr(SPRN_PMC3); in switch_pmu_to_guest()
57 host_os_sprs->pmc4 = mfspr(SPRN_PMC4); in switch_pmu_to_guest()
58 host_os_sprs->pmc5 = mfspr(SPRN_PMC5); in switch_pmu_to_guest()
59 host_os_sprs->pmc6 = mfspr(SPRN_PMC6); in switch_pmu_to_guest()
60 host_os_sprs->mmcr1 = mfspr(SPRN_MMCR1); in switch_pmu_to_guest()
61 host_os_sprs->mmcr2 = mfspr(SPRN_MMCR2); in switch_pmu_to_guest()
[all …]
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| D | book3s_hv_interrupts.S | 46 mfspr r3, SPRN_DSCR
51 mfspr r3, SPRN_DABR
70 mfspr r8,SPRN_DEC
115 mfspr r8, SPRN_MMCR2
121 mfspr r7, SPRN_MMCR0 /* save MMCR0 */
123 mfspr r6, SPRN_MMCRA
131 mfspr r5, SPRN_MMCR1
132 mfspr r9, SPRN_SIAR
133 mfspr r10, SPRN_SDAR
140 mfspr r9, SPRN_SIER
[all …]
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| D | book3s_hv_p9_entry.c | 60 vcpu->arch.tar = mfspr(SPRN_TAR); in store_spr_state()
64 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); in store_spr_state()
68 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); in store_spr_state()
69 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); in store_spr_state()
70 vcpu->arch.bescr = mfspr(SPRN_BESCR); in store_spr_state()
74 vcpu->arch.tid = mfspr(SPRN_TIDR); in store_spr_state()
75 vcpu->arch.iamr = mfspr(SPRN_IAMR); in store_spr_state()
76 vcpu->arch.amr = mfspr(SPRN_AMR); in store_spr_state()
77 vcpu->arch.uamor = mfspr(SPRN_UAMOR); in store_spr_state()
78 vcpu->arch.fscr = mfspr(SPRN_FSCR); in store_spr_state()
[all …]
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| D | bookehv_interrupts.S | 71 mfspr r10, SPRN_PID
82 1: mfspr r7, SPRN_TBRU
83 mfspr r8, SPRN_TBRL
84 mfspr r9, SPRN_TBRU
146 mfspr r8, SPRN_ESR
151 mfspr r9, SPRN_DEAR
188 mfspr r12, \scratch
190 mfspr r5, \scratch
202 mfspr r5, \srr0
203 mfspr r6, \srr1
[all …]
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| /linux-6.1.9/arch/powerpc/kernel/ |
| D | cpu_setup_ppc970.S | 25 mfspr r3,SPRN_HID4
32 mfspr r3,SPRN_HID5
40 mfspr r0,SPRN_HID1
76 mfspr r0,SPRN_HID0
90 mfspr r0,SPRN_HID0
98 mfspr r0,SPRN_HID0
99 mfspr r0,SPRN_HID0
100 mfspr r0,SPRN_HID0
101 mfspr r0,SPRN_HID0
102 mfspr r0,SPRN_HID0
[all …]
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| D | head_booke.h | 49 mfspr r10, SPRN_SPRG_THREAD; \
53 mfspr r11, SPRN_SRR1; \
68 mfspr r13, SPRN_SPRG_RSCRATCH0; \
75 mfspr r12,SPRN_SRR0; \
77 mfspr r9,SPRN_SRR1; \
96 mfspr r2,SPRN_SPRG_THREAD
99 mfspr r10,SPRN_XER
115 mfspr r10, SPRN_SPRG_THREAD
122 mfspr r11, SPRN_SRR1
135 mfspr r9, SPRN_SRR1
[all …]
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| D | head_44x.S | 312 mfspr r10, SPRN_DEAR /* Get faulting address */
323 mfspr r12,SPRN_MMUCR
330 mfspr r11,SPRN_SPRG_THREAD
334 mfspr r12,SPRN_MMUCR
335 mfspr r13,SPRN_PID /* Get PID */
358 mfspr r12,SPRN_ESR
396 mfspr r10,SPRN_DEAR
405 mfspr r11, SPRN_SPRG_RSCRATCH4
407 mfspr r13, SPRN_SPRG_RSCRATCH3
408 mfspr r12, SPRN_SPRG_RSCRATCH2
[all …]
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| D | head_32.h | 22 mfspr r10, SPRN_SPRG_THREAD
25 mfspr r11, SPRN_DEAR
27 mfspr r11, SPRN_DAR
31 mfspr r11, SPRN_ESR
33 mfspr r11, SPRN_DSISR
37 mfspr r11, SPRN_SRR0
39 mfspr r11, SPRN_SRR1 /* check whether user or kernel */
49 mfspr r1,SPRN_SPRG_THREAD
71 mfspr r11, SPRN_SPRG_SCRATCH2
83 mfspr r10,SPRN_SPRG_SCRATCH0
[all …]
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| D | head_40x.S | 111 mfspr r10,SPRN_SRR0
112 mfspr r11,SPRN_SRR1
115 mfspr r10,SPRN_DEAR
116 mfspr r11,SPRN_ESR
120 mfspr r11,SPRN_SRR3 /* check whether user or kernel */
126 mfspr r11,SPRN_SPRG_THREAD /* if from user, start at top of */
158 mfspr r12,SPRN_SRR2
159 mfspr r9,SPRN_SRR3
280 mfspr r9, SPRN_PID
282 mfspr r10, SPRN_DEAR /* Get faulting address */
[all …]
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| D | 85xx_entry_mapping.S | 8 mfspr r7, SPRN_PID0
13 mfspr r7,SPRN_MAS1
17 mfspr r7,SPRN_MMUCFG
22 mfspr r7,SPRN_PID1
27 mfspr r7,SPRN_MAS1
30 mfspr r7, SPRN_PID2
37 mfspr r7,SPRN_MAS0
40 mfspr r7,SPRN_MAS1 /* Insure IPROT set */
46 mfspr r9,SPRN_TLB1CFG
53 mfspr r7,SPRN_MAS1
[all …]
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| D | cpu_setup_e500.S | 20 mfspr r0, SPRN_L1CSR1
30 mfspr r0, SPRN_L1CSR0
42 1: mfspr r0, SPRN_L1CSR0
59 mfspr r3, SPRN_PWRMGTCR0
78 mfspr r3, SPRN_PWRMGTCR0
97 mfspr r10,SPRN_MMUCFG
121 mfspr r3,SPRN_HID1
139 mfspr r3, SPRN_MMUCFG
167 mfspr r10,SPRN_MMUCFG
190 mfspr r10,SPRN_MMUCFG
[all …]
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| D | cpu_setup_power.c | 64 fscr = mfspr(SPRN_FSCR); in init_FSCR()
73 fscr = mfspr(SPRN_FSCR); in init_FSCR_power9()
83 fscr = mfspr(SPRN_FSCR); in init_FSCR_power10()
93 hfscr = mfspr(SPRN_HFSCR); in init_HFSCR()
142 init_LPCR_ISA206(mfspr(SPRN_LPCR), LPCR_LPES1 >> LPCR_LPES_SH); in __setup_cpu_power7()
156 init_LPCR_ISA206(mfspr(SPRN_LPCR), LPCR_LPES1 >> LPCR_LPES_SH); in __restore_cpu_power7()
171 init_LPCR_ISA206(mfspr(SPRN_LPCR) | LPCR_PECEDH, 0); /* LPES = 0 */ in __setup_cpu_power8()
192 init_LPCR_ISA206(mfspr(SPRN_LPCR) | LPCR_PECEDH, 0); /* LPES = 0 */ in __restore_cpu_power8()
211 init_LPCR_ISA300((mfspr(SPRN_LPCR) | LPCR_PECEDH | LPCR_PECE_HVEE |\ in __setup_cpu_power9()
233 init_LPCR_ISA300((mfspr(SPRN_LPCR) | LPCR_PECEDH | LPCR_PECE_HVEE |\ in __restore_cpu_power9()
[all …]
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| D | cpu_setup_6xx.S | 85 mfspr r11,SPRN_HID0
103 mfspr r11,SPRN_HID0
140 mfspr r11,SPRN_MSSSR0
162 mfspr r11,SPRN_HID0
186 mfspr r10, SPRN_HID1
221 mfspr r11,SPRN_L3CR
232 mfspr r11,SPRN_HID0
263 mfspr r3,SPRN_L2CR
266 mfspr r3,SPRN_MSSCR0
327 mfspr r3,SPRN_HID0
[all …]
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| D | exceptions-64e.S | 84 mfspr r10,SPRN_SPRG_TLB_EXFRAME
92 mfspr r10,SPRN_SRR0
94 mfspr r10,SPRN_SRR1
96 mfspr r10,SPRN_SPRG_GEN_SCRATCH
98 mfspr r10,SPRN_SPRG_TLB_SCRATCH
100 mfspr r10,SPRN_MAS0
102 mfspr r10,SPRN_MAS1
104 mfspr r10,SPRN_MAS2
106 mfspr r10,SPRN_MAS3
108 mfspr r10,SPRN_MAS6
[all …]
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| D | swsusp_85xx.S | 65 mfspr r4,SPRN_TCR
69 1: mfspr r4,SPRN_TBRU
71 mfspr r5,SPRN_TBRL
73 mfspr r3,SPRN_TBRU
78 mfspr r4,SPRN_SPRG0
80 mfspr r4,SPRN_SPRG1
82 mfspr r4,SPRN_SPRG2
84 mfspr r4,SPRN_SPRG3
86 mfspr r4,SPRN_SPRG4
88 mfspr r4,SPRN_SPRG5
[all …]
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| D | head_8xx.S | 198 mfspr r10, SPRN_SRR0 /* Get effective address of fault */
205 mfspr r10, SPRN_M_TWB /* Get level 1 table */
215 mfspr r10, SPRN_MD_TWC
232 0: mfspr r10, SPRN_SPRG_SCRATCH2
233 mfspr r11, SPRN_M_TW
242 mfspr r10, SPRN_SPRG_SCRATCH2
243 mfspr r11, SPRN_M_TW
255 mfspr r10, SPRN_MD_EPN
257 mfspr r10, SPRN_M_TWB /* Get level 1 table */
266 mfspr r10, SPRN_MD_TWC
[all …]
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| D | head_85xx.S | 212 mfspr r24,SPRN_PIR
367 mfspr r5,SPRN_ESR /* Grab the ESR, save it */
369 mfspr r4,SPRN_DEAR /* Grab the DEAR, save it */
424 mfspr r10, SPRN_SPRG_THREAD
428 mfspr r11, SPRN_SRR1
437 mfspr r11, SPRN_SRR1
443 mfspr r10, SPRN_DEAR /* Get faulting address */
454 mfspr r12,SPRN_MAS1 /* Set TID to 0 */
462 mfspr r11,SPRN_SPRG_THREAD
466 mfspr r12, SPRN_MAS1
[all …]
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| D | l2cr_6xx.S | 116 mfspr r8,SPRN_HID0 /* Save HID0 in r8 */
123 mfspr r4,SPRN_L2CR
154 mfspr r4,SPRN_MSSCR0
217 10: mfspr r3,SPRN_L2CR
224 3: mfspr r3,SPRN_L2CR
244 mfspr r3,SPRN_MSSCR0
269 mfspr r3,SPRN_L2CR
299 mfspr r4,SPRN_L3CR
350 10: mfspr r3,SPRN_L3CR
388 mfspr r3,SPRN_L3CR
[all …]
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| /linux-6.1.9/arch/powerpc/platforms/83xx/ |
| D | suspend-asm.S | 69 mfspr r5, SPRN_HID0
70 mfspr r6, SPRN_HID1
71 mfspr r7, SPRN_HID2
77 mfspr r4, SPRN_IABR
78 mfspr r5, SPRN_IABR2
79 mfspr r6, SPRN_IBCR
80 mfspr r7, SPRN_DABR
81 mfspr r8, SPRN_DABR2
82 mfspr r9, SPRN_DBCR
91 mfspr r4, SPRN_SPRG0
[all …]
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| /linux-6.1.9/tools/testing/selftests/powerpc/pmu/ebb/ |
| D | ebb.c | 39 val = mfspr(SPRN_MMCR0); in reset_ebb_with_clear_mask()
61 val = mfspr(SPRN_MMCR0); in ebb_check_mmcr0()
104 val = mfspr(SPRN_BESCR); in standard_ebb_callee()
113 val = mfspr(SPRN_MMCR0); in standard_ebb_callee()
221 mmcr0 = mfspr(SPRN_MMCR0); in dump_ebb_hw_state()
222 bescr = mfspr(SPRN_BESCR); in dump_ebb_hw_state()
236 mmcr0, decode_mmcr0(mmcr0), mfspr(SPRN_MMCR2), in dump_ebb_hw_state()
237 mfspr(SPRN_EBBHR), bescr, decode_bescr(bescr), in dump_ebb_hw_state()
238 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), mfspr(SPRN_PMC3), in dump_ebb_hw_state()
239 mfspr(SPRN_PMC4), mfspr(SPRN_PMC5), mfspr(SPRN_PMC6), in dump_ebb_hw_state()
[all …]
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| /linux-6.1.9/arch/openrisc/kernel/ |
| D | setup.c | 98 unsigned long upr = mfspr(SPR_UPR); in print_cpuinfo()
99 unsigned long vr = mfspr(SPR_VR); in print_cpuinfo()
133 1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2), in print_cpuinfo()
134 1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW)); in print_cpuinfo()
137 1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2), in print_cpuinfo()
138 1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW)); in print_cpuinfo()
182 iccfgr = mfspr(SPR_ICCFGR); in setup_cpuinfo()
189 dccfgr = mfspr(SPR_DCCFGR); in setup_cpuinfo()
204 cpuinfo->coreid = mfspr(SPR_COREID); in setup_cpuinfo()
314 vr = mfspr(SPR_VR); in show_cpuinfo()
[all …]
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| D | head.S | 55 #define EMERGENCY_PRINT_LOAD_GPR4 l.mfspr r4,r0,SPR_SHADOW_GPR(14)
58 #define EMERGENCY_PRINT_LOAD_GPR5 l.mfspr r5,r0,SPR_SHADOW_GPR(15)
61 #define EMERGENCY_PRINT_LOAD_GPR6 l.mfspr r6,r0,SPR_SHADOW_GPR(16)
64 #define EMERGENCY_PRINT_LOAD_GPR7 l.mfspr r7,r0,SPR_SHADOW_GPR(7)
67 #define EMERGENCY_PRINT_LOAD_GPR8 l.mfspr r8,r0,SPR_SHADOW_GPR(8)
70 #define EMERGENCY_PRINT_LOAD_GPR9 l.mfspr r9,r0,SPR_SHADOW_GPR(9)
98 #define EXCEPTION_LOAD_GPR2 l.mfspr r2,r0,SPR_SHADOW_GPR(2)
101 #define EXCEPTION_LOAD_GPR3 l.mfspr r3,r0,SPR_SHADOW_GPR(3)
104 #define EXCEPTION_LOAD_GPR4 l.mfspr r4,r0,SPR_SHADOW_GPR(4)
107 #define EXCEPTION_LOAD_GPR5 l.mfspr r5,r0,SPR_SHADOW_GPR(5)
[all …]
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| /linux-6.1.9/arch/powerpc/platforms/powernv/ |
| D | idle.c | 74 uint64_t lpcr_val = mfspr(SPRN_LPCR); in pnv_save_sprs_for_deep_states()
75 uint64_t hid0_val = mfspr(SPRN_HID0); in pnv_save_sprs_for_deep_states()
76 uint64_t hmeer_val = mfspr(SPRN_HMEER); in pnv_save_sprs_for_deep_states()
117 uint64_t hid1_val = mfspr(SPRN_HID1); in pnv_save_sprs_for_deep_states()
118 uint64_t hid4_val = mfspr(SPRN_HID4); in pnv_save_sprs_for_deep_states()
119 uint64_t hid5_val = mfspr(SPRN_HID5); in pnv_save_sprs_for_deep_states()
341 sprs.tscr = mfspr(SPRN_TSCR); in power7_idle_insn()
342 sprs.worc = mfspr(SPRN_WORC); in power7_idle_insn()
344 sprs.sdr1 = mfspr(SPRN_SDR1); in power7_idle_insn()
345 sprs.rpr = mfspr(SPRN_RPR); in power7_idle_insn()
[all …]
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| /linux-6.1.9/arch/powerpc/platforms/powermac/ |
| D | cache.S | 56 mfspr r8,SPRN_HID0 /* Save SPRN_HID0 in r8 */
85 mfspr r3,SPRN_HID0
99 mfspr r5,SPRN_L2CR
156 1: mfspr r3,SPRN_L2CR
167 mfspr r0,SPRN_HID0
175 mfspr r0,SPRN_HID0
204 mfspr r0,SPRN_MSSCR0
246 mfspr r6,SPRN_LDSTCR
271 mfspr r3,SPRN_L2CR
291 3: mfspr r0,SPRN_L2CR /* wait for it to go to 0 */
[all …]
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| /linux-6.1.9/arch/powerpc/mm/nohash/ |
| D | tlb_low_64e.S | 45 mfspr r12,SPRN_SPRG_TLB_EXFRAME
48 mfspr r13,SPRN_SPRG_PACA
54 mfspr r11, SPRN_SRR1
59 mfspr r16,\addr /* get faulting address */
65 mfspr r11, SPRN_SRR1
84 mfspr r12,SPRN_SPRG_GEN_SCRATCH
113 mfspr r11,SPRN_ESR
129 mfspr r10,SPRN_MAS1
210 mfspr r10,SPRN_MAS1
336 mfspr r15,SPRN_MAS1
[all …]
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