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Searched refs:ios (Results 1 – 25 of 109) sorted by relevance

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/linux-6.1.9/drivers/mmc/core/
Ddebugfs.c56 struct mmc_ios *ios = &host->ios; in mmc_ios_show() local
59 seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); in mmc_ios_show()
62 seq_printf(s, "vdd:\t\t%u ", ios->vdd); in mmc_ios_show()
63 if ((1 << ios->vdd) & MMC_VDD_165_195) in mmc_ios_show()
65 else if (ios->vdd < (ARRAY_SIZE(vdd_str) - 1) in mmc_ios_show()
66 && vdd_str[ios->vdd] && vdd_str[ios->vdd + 1]) in mmc_ios_show()
67 seq_printf(s, "(%s ~ %s V)\n", vdd_str[ios->vdd], in mmc_ios_show()
68 vdd_str[ios->vdd + 1]); in mmc_ios_show()
72 switch (ios->bus_mode) { in mmc_ios_show()
83 seq_printf(s, "bus mode:\t%u (%s)\n", ios->bus_mode, str); in mmc_ios_show()
[all …]
Dhost.h68 return card->host->ios.timing == MMC_TIMING_MMC_HS200; in mmc_card_hs200()
73 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; in mmc_card_ddr52()
78 return card->host->ios.timing == MMC_TIMING_MMC_HS400; in mmc_card_hs400()
83 return card->host->ios.enhanced_strobe; in mmc_card_hs400es()
88 return host->ios.timing == MMC_TIMING_SD_EXP || in mmc_card_sd_express()
89 host->ios.timing == MMC_TIMING_SD_EXP_1_2V; in mmc_card_sd_express()
Dcore.c684 if (card->host->ios.clock) in mmc_set_data_timeout()
686 (card->host->ios.clock / 1000); in mmc_set_data_timeout()
886 struct mmc_ios *ios = &host->ios; in mmc_set_ios() local
890 mmc_hostname(host), ios->clock, ios->bus_mode, in mmc_set_ios()
891 ios->power_mode, ios->chip_select, ios->vdd, in mmc_set_ios()
892 1 << ios->bus_width, ios->timing); in mmc_set_ios()
894 host->ops->set_ios(host, ios); in mmc_set_ios()
902 host->ios.chip_select = mode; in mmc_set_chip_select()
917 host->ios.clock = hz; in mmc_set_clock()
960 host->ios.bus_mode = mode; in mmc_set_bus_mode()
[all …]
/linux-6.1.9/drivers/mmc/host/
Ddw_mmc-k3.c102 static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_k3_set_ios() argument
106 ret = clk_set_rate(host->ciu_clk, ios->clock); in dw_mci_k3_set_ios()
108 dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); in dw_mci_k3_set_ios()
141 static int dw_mci_hi6220_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) in dw_mci_hi6220_switch_voltage() argument
155 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { in dw_mci_hi6220_switch_voltage()
160 } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { in dw_mci_hi6220_switch_voltage()
188 static void dw_mci_hi6220_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi6220_set_ios() argument
193 clock = (ios->clock <= 25000000) ? 25000000 : ios->clock; in dw_mci_hi6220_set_ios()
297 static void dw_mci_hi3660_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3660_set_ios() argument
304 if (!ios->clock || ios->clock == priv->cur_speed) in dw_mci_hi3660_set_ios()
[all …]
Ddw_mmc-hi3798cv200.c26 static void dw_mci_hi3798cv200_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3798cv200_set_ios() argument
32 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
33 ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798cv200_set_ios()
40 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
47 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798cv200_set_ios()
53 if (ios->timing == MMC_TIMING_MMC_HS || in dw_mci_hi3798cv200_set_ios()
54 ios->timing == MMC_TIMING_LEGACY) in dw_mci_hi3798cv200_set_ios()
56 else if (ios->timing == MMC_TIMING_MMC_HS200) in dw_mci_hi3798cv200_set_ios()
Ddw_mmc-rockchip.c29 static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_rk3288_set_ios() argument
36 if (ios->clock == 0) in dw_mci_rk3288_set_ios()
48 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios()
49 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
50 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
52 cclkin = ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
66 if (!IS_ERR(priv->sample_clk) && ios->timing <= MMC_TIMING_SD_HS) in dw_mci_rk3288_set_ios()
106 switch (ios->timing) { in dw_mci_rk3288_set_ios()
113 if (ios->bus_width == MMC_BUS_WIDTH_8) in dw_mci_rk3288_set_ios()
Dmmci_stm32_sdmmc.c253 if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52 || in mmci_sdmmc_set_clkreg()
254 host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) in mmci_sdmmc_set_clkreg()
282 if (host->mmc->ios.power_mode == MMC_POWER_ON) in mmci_sdmmc_set_clkreg()
287 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_sdmmc_set_clkreg()
289 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_sdmmc_set_clkreg()
300 if (host->mmc->ios.timing >= MMC_TIMING_UHS_SDR50) { in mmci_sdmmc_set_clkreg()
302 if (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104 || in mmci_sdmmc_set_clkreg()
303 host->mmc->ios.timing == MMC_TIMING_MMC_HS200) { in mmci_sdmmc_set_clkreg()
323 struct mmc_ios ios = host->mmc->ios; in mmci_sdmmc_set_pwrreg() local
331 if (ios.power_mode == MMC_POWER_OFF) { in mmci_sdmmc_set_pwrreg()
[all …]
Dowl-mmc.c426 static void owl_mmc_set_clk(struct owl_mmc_host *owl_host, struct mmc_ios *ios) in owl_mmc_set_clk() argument
428 if (!ios->clock) in owl_mmc_set_clk()
431 owl_host->clock = ios->clock; in owl_mmc_set_clk()
432 owl_mmc_set_clk_rate(owl_host, ios->clock); in owl_mmc_set_clk()
436 struct mmc_ios *ios) in owl_mmc_set_bus_width() argument
442 switch (ios->bus_width) { in owl_mmc_set_bus_width()
484 static void owl_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in owl_mmc_set_ios() argument
488 switch (ios->power_mode) { in owl_mmc_set_ios()
517 if (ios->clock != owl_host->clock) in owl_mmc_set_ios()
518 owl_mmc_set_clk(owl_host, ios); in owl_mmc_set_ios()
[all …]
Dalcor.c692 static void alcor_set_timing(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_timing() argument
696 if (ios->timing == MMC_TIMING_LEGACY) { in alcor_set_timing()
705 static void alcor_set_bus_width(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_bus_width() argument
710 if (ios->bus_width == MMC_BUS_WIDTH_1) { in alcor_set_bus_width()
712 } else if (ios->bus_width == MMC_BUS_WIDTH_4) { in alcor_set_bus_width()
845 static void alcor_set_power_mode(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_power_mode() argument
850 switch (ios->power_mode) { in alcor_set_power_mode()
852 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
880 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
887 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
[all …]
Dsdhci-pci-arasan.c250 if (arasan_host->chg_clk == host->mmc->ios.clock) in arasan_select_phy_clock()
253 arasan_host->chg_clk = host->mmc->ios.clock; in arasan_select_phy_clock()
254 if (host->mmc->ios.clock == 200000000) in arasan_select_phy_clock()
256 else if (host->mmc->ios.clock == 100000000) in arasan_select_phy_clock()
258 else if (host->mmc->ios.clock == 50000000) in arasan_select_phy_clock()
267 switch (host->mmc->ios.timing) { in arasan_select_phy_clock()
280 host->mmc->ios.drv_type, 0x0, in arasan_select_phy_clock()
290 host->mmc->ios.drv_type, 0xa, in arasan_select_phy_clock()
Dsunxi-mmc.c723 struct mmc_ios *ios, u32 rate) in sunxi_mmc_clk_set_phase() argument
741 if (ios->timing != MMC_TIMING_UHS_DDR50 && in sunxi_mmc_clk_set_phase()
742 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase()
744 } else if (ios->bus_width == MMC_BUS_WIDTH_8) { in sunxi_mmc_clk_set_phase()
761 struct mmc_ios *ios) in sunxi_mmc_clk_set_rate() argument
765 u32 rval, clock = ios->clock, div = 1; in sunxi_mmc_clk_set_rate()
775 if (!ios->clock) in sunxi_mmc_clk_set_rate()
787 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate()
789 ios->bus_width == MMC_BUS_WIDTH_8)) { in sunxi_mmc_clk_set_rate()
843 ret = sunxi_mmc_clk_set_phase(host, ios, rate); in sunxi_mmc_clk_set_rate()
[all …]
Dsdhci-msm.c335 struct mmc_ios ios = host->mmc->ios; in msm_get_clock_mult_for_bus_mode() local
342 if (ios.timing == MMC_TIMING_UHS_DDR50 || in msm_get_clock_mult_for_bus_mode()
343 ios.timing == MMC_TIMING_MMC_DDR52 || in msm_get_clock_mult_for_bus_mode()
344 ios.timing == MMC_TIMING_MMC_HS400 || in msm_get_clock_mult_for_bus_mode()
355 struct mmc_ios curr_ios = host->mmc->ios; in msm_set_clock_rate_for_bus_mode()
819 struct mmc_ios ios = host->mmc->ios; in msm_hc_select_hs400() local
835 if ((msm_host->tuning_done || ios.enhanced_strobe) && in msm_hc_select_hs400()
888 struct mmc_ios ios = host->mmc->ios; in sdhci_msm_hc_select_mode() local
890 if (ios.timing == MMC_TIMING_MMC_HS400 || in sdhci_msm_hc_select_mode()
1025 if (mmc->ios.enhanced_strobe) { in sdhci_msm_cm_dll_sdc4_calibration()
[all …]
Domap_hsmmc.c220 struct mmc_ios *ios = &mmc->ios; in omap_hsmmc_enable_supply() local
223 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in omap_hsmmc_enable_supply()
520 static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios) in calc_divisor() argument
524 if (ios->clock) { in calc_divisor()
525 dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); in calc_divisor()
535 struct mmc_ios *ios = &host->mmc->ios; in omap_hsmmc_set_clock() local
540 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); in omap_hsmmc_set_clock()
546 clkdiv = calc_divisor(host, ios); in omap_hsmmc_set_clock()
568 (ios->timing != MMC_TIMING_MMC_DDR52) && in omap_hsmmc_set_clock()
569 (ios->timing != MMC_TIMING_UHS_DDR50) && in omap_hsmmc_set_clock()
[all …]
Dsdhci.c382 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_init()
951 struct mmc_ios *ios = &mmc->ios; in sdhci_calc_sw_timeout() local
952 unsigned char bus_width = 1 << ios->bus_width; in sdhci_calc_sw_timeout()
2322 static bool sdhci_presetable_values_change(struct sdhci_host *host, struct mmc_ios *ios) in sdhci_presetable_values_change() argument
2330 (sdhci_preset_needed(host, ios->timing) || host->drv_type != ios->drv_type); in sdhci_presetable_values_change()
2333 void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in sdhci_set_ios() argument
2342 if (ios->power_mode == MMC_POWER_UNDEFINED) in sdhci_set_ios()
2347 ios->power_mode == MMC_POWER_OFF) in sdhci_set_ios()
2356 if (ios->power_mode == MMC_POWER_OFF) { in sdhci_set_ios()
2362 (ios->power_mode == MMC_POWER_UP) && in sdhci_set_ios()
[all …]
Dsdhci-xenon.c276 static void xenon_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in xenon_set_ios() argument
290 if ((ios->timing == MMC_TIMING_MMC_HS400) || in xenon_set_ios()
291 (ios->timing == MMC_TIMING_MMC_HS200) || in xenon_set_ios()
292 (ios->timing == MMC_TIMING_MMC_HS)) { in xenon_set_ios()
304 sdhci_set_ios(mmc, ios); in xenon_set_ios()
305 xenon_phy_adj(host, ios); in xenon_set_ios()
312 struct mmc_ios *ios) in xenon_start_signal_voltage_switch() argument
328 xenon_soc_pad_ctrl(host, ios->signal_voltage); in xenon_start_signal_voltage_switch()
338 return sdhci_start_signal_voltage_switch(mmc, ios); in xenon_start_signal_voltage_switch()
Dmvsdio.c598 static void mvsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in mvsd_set_ios() argument
604 if (ios->power_mode == MMC_POWER_UP) in mvsd_set_ios()
607 if (ios->clock == 0) { in mvsd_set_ios()
612 } else if (ios->clock != host->clock) { in mvsd_set_ios()
613 u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1; in mvsd_set_ios()
617 host->clock = ios->clock; in mvsd_set_ios()
620 ios->clock, host->base_clock / (m+1), m); in mvsd_set_ios()
631 if (ios->bus_mode == MMC_BUSMODE_PUSHPULL) in mvsd_set_ios()
634 if (ios->bus_width == MMC_BUS_WIDTH_4) in mvsd_set_ios()
645 if (ios->timing == MMC_TIMING_MMC_HS || in mvsd_set_ios()
[all …]
Dmeson-mx-sdhc-mmc.c269 static int meson_mx_sdhc_set_clk(struct mmc_host *mmc, struct mmc_ios *ios) in meson_mx_sdhc_set_clk() argument
277 if (ios->clock) { in meson_mx_sdhc_set_clk()
278 ret = clk_set_rate(host->sd_clk, ios->clock); in meson_mx_sdhc_set_clk()
282 ios->clock, host->error); in meson_mx_sdhc_set_clk()
300 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) in meson_mx_sdhc_set_clk()
325 static void meson_mx_sdhc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in meson_mx_sdhc_set_ios() argument
328 unsigned short vdd = ios->vdd; in meson_mx_sdhc_set_ios()
330 switch (ios->power_mode) { in meson_mx_sdhc_set_ios()
350 host->error = meson_mx_sdhc_set_clk(mmc, ios); in meson_mx_sdhc_set_ios()
354 switch (ios->bus_width) { in meson_mx_sdhc_set_ios()
[all …]
Dpxamci.c441 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in pxamci_set_ios() argument
445 if (ios->clock) { in pxamci_set_ios()
447 unsigned int clk = rate / ios->clock; in pxamci_set_ios()
452 if (ios->clock == 26000000) { in pxamci_set_ios()
465 if (rate / clk > ios->clock) in pxamci_set_ios()
481 if (host->power_mode != ios->power_mode) { in pxamci_set_ios()
484 host->power_mode = ios->power_mode; in pxamci_set_ios()
486 ret = pxamci_set_power(host, ios->power_mode, ios->vdd); in pxamci_set_ios()
498 if (ios->power_mode == MMC_POWER_ON) in pxamci_set_ios()
502 if (ios->bus_width == MMC_BUS_WIDTH_4) in pxamci_set_ios()
Dusdhi6rol0.c727 static void usdhi6_clk_set(struct usdhi6_host *host, struct mmc_ios *ios) in usdhi6_clk_set() argument
729 unsigned long rate = ios->clock; in usdhi6_clk_set()
750 if (ios->timing != MMC_TIMING_UHS_DDR50) { in usdhi6_clk_set()
794 static void usdhi6_set_power(struct usdhi6_host *host, struct mmc_ios *ios) in usdhi6_set_power() argument
801 ios->power_mode ? ios->vdd : 0); in usdhi6_set_power()
818 static void usdhi6_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in usdhi6_set_ios() argument
825 ios->clock, ios->vdd, ios->power_mode, ios->bus_width, ios->timing); in usdhi6_set_ios()
827 switch (ios->power_mode) { in usdhi6_set_ios()
829 usdhi6_set_power(host, ios); in usdhi6_set_ios()
841 usdhi6_set_power(host, ios); in usdhi6_set_ios()
[all …]
Dtmio_mmc_core.c211 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width); in tmio_mmc_reset()
733 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || in tmio_mmc_start_data()
734 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { in tmio_mmc_start_data()
942 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in tmio_mmc_set_ios() argument
956 ios->clock, ios->power_mode); in tmio_mmc_set_ios()
975 switch (ios->power_mode) { in tmio_mmc_set_ios()
985 tmio_mmc_power_on(host, ios->vdd); in tmio_mmc_set_ios()
986 host->set_clock(host, ios->clock); in tmio_mmc_set_ios()
987 tmio_mmc_set_bus_width(host, ios->bus_width); in tmio_mmc_set_ios()
990 host->set_clock(host, ios->clock); in tmio_mmc_set_ios()
[all …]
Dsdhci-omap.c206 ret = mmc_regulator_set_vqmmc(mmc, &mmc->ios); in sdhci_omap_enable_iov()
324 struct mmc_ios *ios = &mmc->ios; in sdhci_omap_execute_tuning() local
337 if (ios->clock <= 52000000) in sdhci_omap_execute_tuning()
341 if (ios->timing == MMC_TIMING_UHS_SDR50 && !(reg & CAPA2_TSDR50)) in sdhci_omap_execute_tuning()
546 struct mmc_ios *ios) in sdhci_omap_start_signal_voltage_switch() argument
560 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { in sdhci_omap_start_signal_voltage_switch()
570 sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); in sdhci_omap_start_signal_voltage_switch()
576 } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { in sdhci_omap_start_signal_voltage_switch()
583 sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); in sdhci_omap_start_signal_voltage_switch()
653 static void sdhci_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in sdhci_omap_set_ios() argument
[all …]
Dtifm_sd.c796 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios) in tifm_sd_ios() argument
807 ios->clock, ios->vdd, ios->bus_mode, ios->chip_select, in tifm_sd_ios()
808 ios->power_mode, ios->bus_width); in tifm_sd_ios()
810 if (ios->bus_width == MMC_BUS_WIDTH_4) { in tifm_sd_ios()
819 if (ios->clock) { in tifm_sd_ios()
820 clk_div1 = 20000000 / ios->clock; in tifm_sd_ios()
824 clk_div2 = 24000000 / ios->clock; in tifm_sd_ios()
828 if ((20000000 / clk_div1) > ios->clock) in tifm_sd_ios()
830 if ((24000000 / clk_div2) > ios->clock) in tifm_sd_ios()
854 host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN); in tifm_sd_ios()
/linux-6.1.9/include/linux/mmc/
Dhost.h146 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
173 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
182 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
198 struct mmc_ios *ios);
214 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
441 struct mmc_ios ios; /* current io bus settings */ member
583 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
593 struct mmc_ios *ios) in mmc_regulator_set_vqmmc() argument
619 return card->host->ios.timing == MMC_TIMING_SD_HS || in mmc_card_hs()
620 card->host->ios.timing == MMC_TIMING_MMC_HS; in mmc_card_hs()
[all …]
/linux-6.1.9/drivers/net/wireless/rsi/
Drsi_91x_sdio.c187 host->ios.chip_select = MMC_CS_DONTCARE; in rsi_reset_card()
188 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; in rsi_reset_card()
189 host->ios.power_mode = MMC_POWER_UP; in rsi_reset_card()
190 host->ios.bus_width = MMC_BUS_WIDTH_1; in rsi_reset_card()
191 host->ios.timing = MMC_TIMING_LEGACY; in rsi_reset_card()
192 host->ops->set_ios(host, &host->ios); in rsi_reset_card()
200 host->ios.clock = host->f_min; in rsi_reset_card()
201 host->ios.power_mode = MMC_POWER_ON; in rsi_reset_card()
202 host->ops->set_ios(host, &host->ios); in rsi_reset_card()
211 host->ios.chip_select = MMC_CS_HIGH; in rsi_reset_card()
[all …]
/linux-6.1.9/drivers/staging/greybus/
Dsdio.c588 static void gb_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in gb_mmc_set_ios() argument
601 request.clock = cpu_to_le32(ios->clock); in gb_mmc_set_ios()
603 if (ios->vdd) in gb_mmc_set_ios()
604 vdd = 1 << (ios->vdd - GB_SDIO_VDD_SHIFT); in gb_mmc_set_ios()
607 request.bus_mode = ios->bus_mode == MMC_BUSMODE_OPENDRAIN ? in gb_mmc_set_ios()
611 switch (ios->power_mode) { in gb_mmc_set_ios()
628 switch (ios->bus_width) { in gb_mmc_set_ios()
642 switch (ios->timing) { in gb_mmc_set_ios()
680 switch (ios->signal_voltage) { in gb_mmc_set_ios()
694 switch (ios->drv_type) { in gb_mmc_set_ios()
[all …]

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