Searched refs:clk_index (Results 1 – 8 of 8) sorted by relevance
/linux-6.1.9/sound/soc/fsl/ |
D | fsl_asrc.c | 387 u32 clk_index[2], div[2]; in fsl_asrc_config_pair() local 465 clk_index[IN] = asrc_priv->clk_map[IN][config->inclk]; in fsl_asrc_config_pair() 466 clk_index[OUT] = asrc_priv->clk_map[OUT][config->outclk]; in fsl_asrc_config_pair() 469 clk = asrc_priv->asrck_clk[clk_index[ideal ? OUT : IN]]; in fsl_asrc_config_pair() 483 inrate, clk_index[ideal ? OUT : IN]); in fsl_asrc_config_pair() 489 clk = asrc_priv->asrck_clk[clk_index[OUT]]; in fsl_asrc_config_pair() 499 outrate, clk_index[OUT]); in fsl_asrc_config_pair() 525 ASRCSR_AICS(index, clk_index[IN]) | in fsl_asrc_config_pair() 526 ASRCSR_AOCS(index, clk_index[OUT])); in fsl_asrc_config_pair() 668 int clk_rate, clk_index; in fsl_asrc_select_clk() local [all …]
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/linux-6.1.9/drivers/clk/bcm/ |
D | clk-kona.c | 881 if (sel->clk_index == BAD_CLK_INDEX) { in __sel_commit() 889 sel->clk_index = index; in __sel_commit() 894 BUG_ON((u32)sel->clk_index >= sel->parent_count); in __sel_commit() 895 parent_sel = sel->parent_sel[sel->clk_index]; in __sel_commit() 944 previous = sel->clk_index; in selector_write() 948 sel->clk_index = index; in selector_write() 959 sel->clk_index = previous; /* Revert the change */ in selector_write()
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D | clk-kona.h | 338 u8 clk_index; /* current selected index in parent_sel[] */ member 347 .clk_index = BAD_CLK_INDEX, \
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/linux-6.1.9/drivers/phy/ti/ |
D | phy-j721e-wiz.c | 782 const struct wiz_clk_mux_sel *mux_sel, int clk_index) in wiz_mux_clk_register() argument 807 output_clk_names[clk_index]); in wiz_mux_clk_register() 814 snprintf(clk_name, sizeof(clk_name), "%s_%s", dev_name(dev), output_clk_names[clk_index]); in wiz_mux_clk_register() 834 wiz->output_clks[clk_index] = clk; in wiz_mux_clk_register() 1021 int clk_index; in wiz_clock_register() local 1025 clk_index = TI_WIZ_PLL0_REFCLK; in wiz_clock_register() 1026 for (i = 0; i < WIZ_MUX_NUM_CLOCKS; i++, clk_index++) { in wiz_clock_register() 1027 ret = wiz_mux_clk_register(wiz, wiz->mux_sel_field[i], &clk_mux_sel[i], clk_index); in wiz_clock_register() 1029 dev_err(dev, "Failed to register clk: %s\n", output_clk_names[clk_index]); in wiz_clock_register()
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/linux-6.1.9/drivers/phy/cadence/ |
D | phy-cadence-sierra.c | 720 int clk_index) in cdns_sierra_pll_mux_register() argument 741 clk = sp->input_clks[pll_mux_parent_index[clk_index][i]]; in cdns_sierra_pll_mux_register() 749 snprintf(clk_name, sizeof(clk_name), "%s_%s", dev_name(dev), clk_names[clk_index]); in cdns_sierra_pll_mux_register() 768 sp->output_clks[clk_index] = clk; in cdns_sierra_pll_mux_register() 779 int ret = 0, i, clk_index; in cdns_sierra_phy_register_pll_mux() local 781 clk_index = CDNS_SIERRA_PLL_CMNLC; in cdns_sierra_phy_register_pll_mux() 782 for (i = 0; i < SIERRA_NUM_CMN_PLLC; i++, clk_index++) { in cdns_sierra_phy_register_pll_mux() 788 termen_field, clk_index); in cdns_sierra_phy_register_pll_mux()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/ |
D | amdgpu_pm.c | 852 uint clk_index; in amdgpu_get_pp_od_clk_voltage() local 865 for (clk_index = 0 ; clk_index < 6 ; clk_index++) { in amdgpu_get_pp_od_clk_voltage() 866 ret = amdgpu_dpm_emit_clock_levels(adev, od_clocks[clk_index], buf, &size); in amdgpu_get_pp_od_clk_voltage()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | navi10_ppt.c | 1222 uint32_t clk_index = 0; in navi10_is_support_fine_grained_dpm() local 1224 clk_index = smu_cmn_to_asic_specific_index(smu, in navi10_is_support_fine_grained_dpm() 1227 dpm_desc = &pptable->DpmDescriptor[clk_index]; in navi10_is_support_fine_grained_dpm()
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D | sienna_cichlid_ppt.c | 1222 uint32_t clk_index = 0; in sienna_cichlid_is_support_fine_grained_dpm() local 1225 clk_index = smu_cmn_to_asic_specific_index(smu, in sienna_cichlid_is_support_fine_grained_dpm() 1228 dpm_desc = &table_member[clk_index]; in sienna_cichlid_is_support_fine_grained_dpm()
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