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Searched refs:PLL_VPLL (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Drk3399-cru.h17 #define PLL_VPLL 7 macro
Drk3568-cru.h74 #define PLL_VPLL 5 macro
/linux-6.1.9/arch/arm64/boot/dts/rockchip/
Drk3566-roc-pc.dts614 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
Drk3568-rock-3a.dts716 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
Drk3568-evb1-v10.dts679 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
Drk3566-quartz64-b.dts726 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
Drk3568-bpi-r2-pro.dts829 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
Drk3566-quartz64-a.dts826 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
Drk3566-anbernic-rgxx3.dtsi818 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
Drk3399.dtsi1912 <&cru PLL_VPLL>;
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3399.c231 [vpll] = PLL(pll_rk3399, PLL_VPLL, "vpll", mux_pll_p, 0, RK3399_PLL_CON(48),
Dclk-rk3568.c336 [vpll] = PLL(pll_rk3328, PLL_VPLL, "vpll", mux_pll_p,