| /linux-6.1.9/arch/arm64/kvm/ |
| D | sys_regs.h | 17 sys_reg((u32)(x)->Op0, (u32)(x)->Op1, \
22 u8 Op1; member
32 .Op1 = ((esr) >> 14) & 0x7, \
39 ((struct sys_reg_params){ .Op1 = ((esr) >> 14) & 0x7, \
57 u8 Op1; member
101 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_msg()
177 if (i1->Op1 != i2->Op1) in cmp_sys_reg()
178 return i1->Op1 - i2->Op1; in cmp_sys_reg()
216 #define Op1(_x) .Op1 = _x macro
223 Op0(sys_reg_Op0(reg)), Op1(sys_reg_Op1(reg)), \
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| D | sys_regs.c | 214 switch (p->Op1) { in access_gic_sgi()
1363 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
1838 { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \
1840 { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n }, \
1842 { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n }, \
1844 { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }
1847 { AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_bvr, NULL, n }
1856 { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgdidr },
1858 { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi },
1862 { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi },
[all …]
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| D | trace_handle_exit.h | 169 __field(u8, Op1)
181 __entry->Op1 = reg->Op1;
189 __entry->Op0, __entry->Op1, __entry->CRn,
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| /linux-6.1.9/arch/arm/include/asm/vdso/ |
| D | cp15.h | 14 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument
15 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
16 #define __ACCESS_CP15_64(Op1, CRm) \ argument
17 "mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
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| /linux-6.1.9/arch/arm64/kvm/hyp/nvhe/ |
| D | sys_regs.c | 333 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
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| /linux-6.1.9/Documentation/arm64/ |
| D | cpu-feature-registers.rst | 95 Op0=3, Op1=0, CRn=0, CRm=0,2,3,4,5,6,7
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| /linux-6.1.9/Documentation/virt/kvm/devices/ |
| D | arm-vgic-v3.rst | 190 | Op 0 | Op1 | CRn | CRm | Op2 |
|