Lines Matching refs:Op1
214 switch (p->Op1) { in access_gic_sgi()
1363 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
1838 { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \
1840 { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n }, \
1842 { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n }, \
1844 { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }
1847 { AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_bvr, NULL, n }
1856 { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgdidr },
1858 { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi },
1862 { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi },
1865 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug_regs, NULL, MDCCINT_EL1 },
1867 { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug_regs, NULL, MDSCR_EL1 },
1870 { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi },
1872 { Op1( 0), CRn( 0), CRm( 3), Op2( 2), trap_raz_wi },
1877 { Op1( 0), CRn( 0), CRm( 6), Op2( 0), trap_raz_wi },
1879 { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi },
1882 { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug_regs, NULL, DBGVCR32_EL2 },
1894 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), trap_raz_wi },
1898 { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_oslar_el1 },
1901 { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1, NULL, OSLSR_EL1 },
1905 { Op1( 0), CRn( 1), CRm( 3), Op2( 4), trap_raz_wi },
1908 { Op1( 0), CRn( 1), CRm( 4), Op2( 4), trap_raz_wi },
1922 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), trap_raz_wi },
1925 { Op1( 0), CRn( 7), CRm( 0), Op2( 7), trap_raz_wi },
1927 { Op1( 0), CRn( 7), CRm( 1), Op2( 7), trap_raz_wi },
1929 { Op1( 0), CRn( 7), CRm( 2), Op2( 7), trap_raz_wi },
1931 { Op1( 0), CRn( 7), CRm( 8), Op2( 6), trap_raz_wi },
1933 { Op1( 0), CRn( 7), CRm( 9), Op2( 6), trap_raz_wi },
1935 { Op1( 0), CRn( 7), CRm(14), Op2( 6), trap_dbgauthstatus_el1 },
1941 { Op1( 0), CRm( 1), .access = trap_raz_wi },
1944 { Op1( 0), CRm( 2), .access = trap_raz_wi },
1949 Op1(_Op1), CRn(_CRn), CRm(_CRm), Op2(_Op2), \
1969 { Op1( 0), CRn( 0), CRm( 0), Op2( 1), access_ctr },
1970 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, SCTLR_EL1 },
1972 { AA32(LO), Op1( 0), CRn( 1), CRm( 0), Op2( 1), access_actlr, NULL, ACTLR_EL1 },
1974 { AA32(HI), Op1( 0), CRn( 1), CRm( 0), Op2( 3), access_actlr, NULL, ACTLR_EL1 },
1975 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },
1976 { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, TTBR1_EL1 },
1978 { AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },
1980 { AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },
1981 { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, DACR32_EL2 },
1983 { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, ESR_EL1 },
1984 { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, IFSR32_EL2 },
1986 { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, AFSR0_EL1 },
1988 { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, AFSR1_EL1 },
1990 { AA32(LO), Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL, FAR_EL1 },
1992 { AA32(HI), Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, FAR_EL1 },
1997 { Op1( 0), CRn( 7), CRm( 6), Op2( 2), access_dcsw },
1998 { Op1( 0), CRn( 7), CRm(10), Op2( 2), access_dcsw },
1999 { Op1( 0), CRn( 7), CRm(14), Op2( 2), access_dcsw },
2023 { AA32(LO), Op1( 0), CRn(10), CRm( 2), Op2( 0), access_vm_reg, NULL, MAIR_EL1 },
2025 { AA32(HI), Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, MAIR_EL1 },
2027 { AA32(LO), Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, AMAIR_EL1 },
2029 { AA32(HI), Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, AMAIR_EL1 },
2032 { Op1( 0), CRn(12), CRm(12), Op2( 5), access_gic_sre },
2034 { Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, CONTEXTIDR_EL1 },
2107 { Op1(1), CRn( 0), CRm( 0), Op2(0), access_ccsidr },
2108 { Op1(1), CRn( 0), CRm( 0), Op2(1), access_clidr },
2109 { Op1(2), CRn( 0), CRm( 0), Op2(0), access_csselr, NULL, CSSELR_EL1 },
2113 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },
2115 { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI1R */
2116 { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },
2117 { Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_ASGI1R */
2118 { Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI0R */
2246 params.Op1 = (esr >> 16) & 0xf; in kvm_handle_cp_64()
2292 params->Op1 = 0; in kvm_esr_cp10_id_to_sys64()
2436 if (params.Op1 == 0 && params.CRn == 0 && params.CRm) in kvm_handle_cp15_32()
2550 params->Op1 = ((id & KVM_REG_ARM64_SYSREG_OP1_MASK) in index_to_params()
2862 (reg->Op1 << KVM_REG_ARM64_SYSREG_OP1_SHIFT) | in sys_reg_to_index()