Searched refs:MII_DEVADDR_C45_SHIFT (Results 1 – 4 of 4) sorted by relevance
22 mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f; in sja1105_pcs_mdio_read()51 mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f; in sja1105_pcs_mdio_write()78 mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f; in sja1110_pcs_mdio_read()128 mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f; in sja1110_pcs_mdio_write()179 u16 mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f; in sja1105_base_t1_mdio_read()220 u16 mmd = (reg >> MII_DEVADDR_C45_SHIFT) & 0x1f; in sja1105_base_t1_mdio_write()
59 *hw_addr |= (phyreg >> MII_DEVADDR_C45_SHIFT) << MII_XGMAC_DA_SHIFT; in stmmac_xgmac2_c45_format()242 value |= ((phyreg >> MII_DEVADDR_C45_SHIFT) << in stmmac_mdio_read()309 value |= ((phyreg >> MII_DEVADDR_C45_SHIFT) << in stmmac_mdio_write()
17 #define MII_DEVADDR_C45_SHIFT 16 macro453 return MII_ADDR_C45 | devad << MII_DEVADDR_C45_SHIFT | regnum; in mdiobus_c45_addr()
802 devad = (regnum >> MII_DEVADDR_C45_SHIFT) & 0x1f; in mt7531_ind_phy_read()820 devad = (regnum >> MII_DEVADDR_C45_SHIFT) & 0x1f; in mt7531_ind_phy_write()