Home
last modified time | relevance | path

Searched refs:DSI (Results 1 – 25 of 162) sorted by relevance

1234567

/linux-6.1.9/Documentation/devicetree/bindings/display/
Dmipi-dsi-bus.txt1 MIPI DSI (Display Serial Interface) busses
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
34 conjunction with another DSI host to drive the same peripheral. Hardware
[all …]
Dtruly,nt35597.txt1 Truly model NT35597 DSI display driver
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
Dbrcm,bcm2835-dsi0.yaml7 title: Broadcom VC4 (VideoCore4) DSI Controller
30 - description: The DSI PLL clock feeding the DSI analog PHY
31 - description: The DSI ESC clock
32 - description: The DSI pixel clock
43 # - description: The DSI byte clock for the PHY
44 # - description: The DSI DDR2 clock
45 # - description: The DSI DDR clock
Ddsi-controller.yaml7 title: Common Properties for DSI Display Panels
13 This document defines device tree properties common to DSI, Display
22 Notice: this binding concerns DSI panels connected directly to a master
23 without any intermediate port graph to the panel. Each DSI master
41 description: Panels connected to the DSI link
49 The virtual channel number of a DSI peripheral. Must be in the range
50 from 0 to 3, as DSI uses a 2-bit addressing scheme. Some DSI
59 another DSI host to drive the same peripheral. Hardware supporting
61 to be driven by the same clock. Only the DSI host instance
Dst,stm32-dsi.yaml7 title: STMicroelectronics STM32 DSI host controller
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
29 - description: DSI bus clock
58 DSI input port node, connected to the ltdc rgb output port.
64 DSI output port node, connected to a panel or a bridge input port.
/linux-6.1.9/Documentation/devicetree/bindings/clock/
Dqcom,mmcc.yaml85 - description: DSI phy instance 1 dsi clock
86 - description: DSI phy instance 1 byte clock
87 - description: DSI phy instance 2 dsi clock
88 - description: DSI phy instance 2 byte clock
129 - description: DSI phy instance 0 dsi clock
130 - description: DSI phy instance 0 byte clock
131 - description: DSI phy instance 1 dsi clock
132 - description: DSI phy instance 1 byte clock
159 - description: DSI phy instance 0 dsi clock
160 - description: DSI phy instance 0 byte clock
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/display/bridge/
Dcdns,dsi.txt1 Cadence DSI bridge
4 The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.
9 - interrupts: interrupt line connected to the DSI bridge.
10 - clocks: DSI bridge clocks.
18 - resets: DSI reset lines.
24 * port 0: this port is only needed if some of your DSI devices are
27 DSI virtual channel used by this device.
31 - one subnode per DSI device connected on the DSI bus. Each DSI device should
Dti,sn65dsi83.yaml7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
45 description: Video port for MIPI DSI Channel-A input
54 description: array of physical DSI data lane indexes.
65 description: Video port for MIPI DSI Channel-B input
74 description: array of physical DSI data lane indexes.
Dintel,keembay-dsi.yaml27 - description: MIPI DSI clock
28 - description: MIPI DSI econfig clock
29 - description: MIPI DSI config clock
43 description: MIPI DSI input port.
47 description: DSI output port.
Dtoshiba,tc358764.txt1 TC358764 MIPI-DSI to LVDS panel bridge
5 - reg: the virtual channel number of a DSI peripheral
13 0: DSI Input, not required, if the bridge is DSI controlled
Dchipone,icn6211.yaml7 title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge
13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone.
15 It has a flexible configuration of MIPI DSI signal input and
25 description: virtual channel number of a DSI peripheral
56 Video port for MIPI DSI input
65 description: array of physical DSI data lane indexes.
Dlontium,lt9211.yaml7 title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.
13 The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
14 or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
41 Primary MIPI DSI port-1 for MIPI input or
54 Primary MIPI DSI port-1 for MIPI output or
Dtoshiba,tc358762.yaml7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge
13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI.
22 description: virtual channel number of a DSI peripheral
34 Video port for MIPI DSI input
Dti,dlpc3433.yaml7 title: TI DLPC3433 MIPI DSI to DMD bridge
14 TI DLPC3433 is a MIPI DSI based display controller bridge
17 It has a flexible configuration of MIPI DSI and DPI signal
49 description: Video port for MIPI DSI input.
58 description: array of physical DSI data lane indexes.
Drenesas,dsi-csi2-tx.yaml7 title: Renesas R-Car MIPI DSI/CSI-2 Encoder
13 This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
14 R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up
28 - description: DSI (and CSI-2) functional clock
54 description: DSI/CSI-2 output port
/linux-6.1.9/drivers/gpu/drm/bridge/
DKconfig19 tristate "Cadence DPI/DSI bridge"
26 Support Cadence DPI to DSI bridge. This is an internal
30 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge"
37 ICN6211 is MIPI-DSI/RGB Converter bridge from chipone.
39 It has a flexible configuration of MIPI DSI signal input
103 tristate "Lontium LT8912B DSI/HDMI bridge"
111 Driver for Lontium LT8912B DSI to HDMI bridge
119 tristate "Lontium LT9211 DSI/LVDS/DPI bridge"
126 Driver for Lontium LT9211 Single/Dual-Link DSI/LVDS or Single DPI
127 input to Single-link/Dual-Link DSI/LVDS or Single DPI output bridge
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/display/panel/
Dsharp,lq101r1sx01.yaml13 This panel requires a dual-channel DSI host to operate. It supports two modes:
17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
18 driven by the first link (DSI-LINK1), left or even, is considered the primary
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
22 Note that in video mode the DSI-LINK1 interface always provides the left/even
23 pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
47 phandle to the DSI peripheral on the secondary link. Note that the
48 presence of this property marks the containing node as DSI-LINK1
Dorisetech,otm8009a.yaml7 title: Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
14 a MIPI-DSI video interface. Its backlight is managed through the DSI link.
25 description: DSI virtual channel
Draspberrypi,7inch-touchscreen.yaml14 This DSI panel contains:
16 - TC358762 DSI->DPI bridge
17 - Atmel microcontroller on I2C for power sequencing the DSI bridge and
21 and this binding covers the DSI display parts but not its touch input.
/linux-6.1.9/drivers/gpu/drm/msm/
DKconfig97 bool "Enable DSI support in MSM DRM driver"
103 Choose this option if you have a need for MIPI DSI connector
107 bool "Enable DSI 28nm PHY driver in MSM DRM"
111 Choose this option if the 28nm DSI PHY is used on the platform.
114 bool "Enable DSI 20nm PHY driver in MSM DRM"
118 Choose this option if the 20nm DSI PHY is used on the platform.
121 bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
125 Choose this option if the 28nm DSI PHY 8960 variant is used on the
129 bool "Enable DSI 14nm PHY driver in MSM DRM (used by MSM8996/APQ8096)"
133 Choose this option if DSI PHY on 8996 is used on the platform.
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/display/exynos/
Dexynos_dsim.txt1 Exynos MIPI DSI Master
11 - interrupts: should contain DSI interrupt
23 according to DSI host bindings (see MIPI DSI bindings [1])
24 - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
26 - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
32 Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
37 1: DSI output
/linux-6.1.9/drivers/gpu/drm/panel/
DKconfig48 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to
49 the host and backlight is controlled through DSI commands.
59 24 bit RGB per pixel. It provides a MIPI DSI interface to
69 45NA WUXGA PANEL DSI Video Mode panel
72 tristate "Generic DSI command mode panels"
77 DRM panel driver for DSI command mode panels with support for
126 The panel has a resolution of 1080x2246. It provides a MIPI DSI
136 KD35T133 controller for 320x480 LCD panels with MIPI-DSI
146 4-lane 800x1280 MIPI DSI panel.
149 tristate "Feiyang FY07024DI26A30-D MIPI-DSI LCD panel"
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/display/ti/
Dti,omap5-dss.txt21 - DSS Submodules: RFBI, DSI, HDMI
59 DSI
66 - interrupts: the DSI interrupt line
68 - vdd-supply: power supply for DSI
73 - Video port for DSI output
74 - DSI controlled peripherals
76 DSI Endpoint required properties:
77 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
Dti,omap4-dss.txt21 - DSS Submodules: RFBI, VENC, DSI, HDMI
78 DSI
85 - interrupts: the DSI interrupt line
87 - vdd-supply: power supply for DSI
92 - Video port for DSI output
93 - DSI controlled peripherals
95 DSI Endpoint required properties:
96 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
/linux-6.1.9/Documentation/devicetree/bindings/phy/
Dmixel,mipi-dsi-phy.yaml7 title: Mixel DSI PHY for i.MX8
13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
15 electrical signals for DSI.
18 in either MIPI-DSI PHY mode or LVDS PHY mode.

1234567