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Searched refs:DISP_CC_MDSS_BYTE1_DIV_CLK_SRC (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dqcom,dispcc-sdm845.h37 #define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 27 macro
Dqcom,dispcc-sm8150.h18 #define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 8 macro
Dqcom,dispcc-sm8250.h18 #define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 8 macro
Dqcom,dispcc-sm8350.h18 #define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 8 macro
Dqcom,sm8450-dispcc.h19 #define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 9 macro
/linux-6.1.9/drivers/clk/qcom/
Ddispcc-sdm845.c780 [DISP_CC_MDSS_BYTE1_DIV_CLK_SRC] =
Ddispcc-sm8250.c1152 [DISP_CC_MDSS_BYTE1_DIV_CLK_SRC] = &disp_cc_mdss_byte1_div_clk_src.clkr,
Ddispcc-sm8450.c1653 [DISP_CC_MDSS_BYTE1_DIV_CLK_SRC] = &disp_cc_mdss_byte1_div_clk_src.clkr,