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Searched refs:DISP_CC_MDSS_AHB_CLK (Results 1 – 25 of 36) sorted by relevance

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/linux-6.1.9/include/dt-bindings/clock/ !
Dqcom,dispcc-qcm2290.h11 #define DISP_CC_MDSS_AHB_CLK 1 macro
Dqcom,sm6115-dispcc.h12 #define DISP_CC_MDSS_AHB_CLK 2 macro
Dqcom,dispcc-sm6125.h10 #define DISP_CC_MDSS_AHB_CLK 1 macro
Dqcom,dispcc-sc7180.h11 #define DISP_CC_MDSS_AHB_CLK 2 macro
Dqcom,dispcc-sm6350.h12 #define DISP_CC_MDSS_AHB_CLK 1 macro
Dqcom,dispcc-sdm845.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
Dqcom,dispcc-sc7280.h11 #define DISP_CC_MDSS_AHB_CLK 1 macro
Dqcom,dispcc-sm8150.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
Dqcom,dispcc-sm8250.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
Dqcom,dispcc-sm8350.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
Dqcom,sm8450-dispcc.h11 #define DISP_CC_MDSS_AHB_CLK 1 macro
/linux-6.1.9/Documentation/devicetree/bindings/display/msm/ !
Ddsi-phy-14nm.yaml62 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-20nm.yaml66 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddpu-sc7280.yaml178 <&dispcc DISP_CC_MDSS_AHB_CLK>,
203 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddpu-sc7180.yaml180 <&dispcc DISP_CC_MDSS_AHB_CLK>,
202 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-28nm.yaml68 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-7nm.yaml69 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-10nm.yaml93 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddp-controller.yaml160 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-controller-main.yaml163 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddpu-sdm845.yaml186 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddpu-qcm2290.yaml197 <&dispcc DISP_CC_MDSS_AHB_CLK>,
/linux-6.1.9/drivers/clk/qcom/ !
Ddispcc-qcm2290.c468 [DISP_CC_MDSS_AHB_CLK] = &disp_cc_mdss_ahb_clk.clkr,
Ddispcc-sm6115.c531 [DISP_CC_MDSS_AHB_CLK] = &disp_cc_mdss_ahb_clk.clkr,
Ddispcc-sc7180.c643 [DISP_CC_MDSS_AHB_CLK] = &disp_cc_mdss_ahb_clk.clkr,

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