Home
last modified time | relevance | path

Searched refs:CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dnbio_v7_2.c241 data |= (CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v7_2_update_medium_grain_clock_gating()
248 data &= ~(CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v7_2_update_medium_grain_clock_gating()
315 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v7_2_get_clockgating_state()
Dnbio_v6_1.c171 data |= (CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v6_1_update_medium_grain_clock_gating()
179 data &= ~(CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v6_1_update_medium_grain_clock_gating()
219 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v6_1_get_clockgating_state()
Dnbio_v2_3.c238 data |= (CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v2_3_update_medium_grain_clock_gating()
245 data &= ~(CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v2_3_update_medium_grain_clock_gating()
287 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v2_3_get_clockgating_state()
Dnbio_v4_3.c248 data |= (CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v4_3_update_medium_grain_clock_gating()
255 data &= ~(CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v4_3_update_medium_grain_clock_gating()
294 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v4_3_get_clockgating_state()
Dnbio_v7_0.c214 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v7_0_get_clockgating_state()
Dnbio_v7_4.c282 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v7_4_get_clockgating_state()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_0_sh_mask.h3665 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK 0x1 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_4_sh_mask.h44505 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_4_3_0_sh_mask.h33930 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_2_3_sh_mask.h56026 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_7_0_sh_mask.h75292 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_6_1_sh_mask.h39856 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_7_2_0_sh_mask.h101562 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro