Searched refs:CGU_CLK_MUX (Results 1 – 9 of 9) sorted by relevance
/linux-6.1.9/drivers/clk/ingenic/ |
D | jz4770-cgu.c | 209 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 216 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 223 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 230 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 237 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 244 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 251 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 258 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 265 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 275 "ssi_mux", CGU_CLK_DIV | CGU_CLK_MUX, [all …]
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D | jz4780-cgu.c | 329 "sclk_a", CGU_CLK_MUX, 336 "cpumux", CGU_CLK_MUX, 365 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV, 373 "ahb2_apb_mux", CGU_CLK_MUX, 392 "ddr", CGU_CLK_MUX | CGU_CLK_DIV, 404 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 413 "i2s_pll", CGU_CLK_MUX | CGU_CLK_DIV, 420 "i2s", CGU_CLK_MUX, 426 "lcd0pixclk", CGU_CLK_MUX | CGU_CLK_DIV, 434 "lcd1pixclk", CGU_CLK_MUX | CGU_CLK_DIV, [all …]
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D | jz4760-cgu.c | 217 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 224 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 231 "lpclk_div", CGU_CLK_DIV | CGU_CLK_MUX, 237 "tve", CGU_CLK_GATE | CGU_CLK_MUX, 243 "lpclk", CGU_CLK_GATE | CGU_CLK_MUX, 249 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 259 "pcm", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 267 "i2s", CGU_CLK_DIV | CGU_CLK_MUX, 274 "usb", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 284 "mmc_mux", CGU_CLK_MUX | CGU_CLK_DIV, [all …]
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D | x1000-cgu.c | 241 "sclk_a", CGU_CLK_MUX, 247 "cpu_mux", CGU_CLK_MUX, 276 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV, 283 "ahb2_apb_mux", CGU_CLK_MUX, 302 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 315 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 323 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 331 "msc_mux", CGU_CLK_MUX, 351 "otg", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 360 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV, [all …]
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D | x1830-cgu.c | 215 "sclk_a", CGU_CLK_MUX, 221 "cpu_mux", CGU_CLK_MUX, 246 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV, 253 "ahb2_apb_mux", CGU_CLK_MUX, 272 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 285 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 294 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 303 "msc_mux", CGU_CLK_MUX, 324 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV, 338 "ssi_mux", CGU_CLK_MUX, [all …]
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D | jz4725b-cgu.c | 152 "i2s", CGU_CLK_MUX | CGU_CLK_DIV, 159 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 173 "udc", CGU_CLK_MUX | CGU_CLK_DIV, 244 "rtc", CGU_CLK_MUX,
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D | jz4740-cgu.c | 166 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 174 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 196 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
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D | cgu.c | 316 if (clk_info->type & CGU_CLK_MUX) { in ingenic_clk_get_parent() 343 if (clk_info->type & CGU_CLK_MUX) { in ingenic_clk_set_parent() 675 if (caps & (CGU_CLK_MUX | CGU_CLK_CUSTOM)) { in ingenic_register_clock() 678 if (caps & CGU_CLK_MUX) in ingenic_register_clock() 729 if (caps & CGU_CLK_MUX) { in ingenic_register_clock() 733 caps &= ~(CGU_CLK_MUX | CGU_CLK_MUX_GLITCHFREE); in ingenic_register_clock()
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D | cgu.h | 158 CGU_CLK_MUX = BIT(3), enumerator
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