Lines Matching refs:CGU_CLK_MUX
329 "sclk_a", CGU_CLK_MUX,
336 "cpumux", CGU_CLK_MUX,
365 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
373 "ahb2_apb_mux", CGU_CLK_MUX,
392 "ddr", CGU_CLK_MUX | CGU_CLK_DIV,
404 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
413 "i2s_pll", CGU_CLK_MUX | CGU_CLK_DIV,
420 "i2s", CGU_CLK_MUX,
426 "lcd0pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
434 "lcd1pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
442 "msc_mux", CGU_CLK_MUX,
469 "uhc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
478 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
485 "ssi", CGU_CLK_MUX,
491 "cim_mclk", CGU_CLK_MUX | CGU_CLK_DIV,
498 "pcm_pll", CGU_CLK_MUX | CGU_CLK_DIV,
506 "pcm", CGU_CLK_MUX | CGU_CLK_GATE,
513 "gpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
522 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
531 "bch", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
546 "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE,