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Searched refs:BA0_CLKCR1 (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/sound/pci/
Dcs4281.c205 #define BA0_CLKCR1 0x0400 /* Clock Control Register 1 */ macro
1280 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs4281_free()
1385 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs4281_chip_init()
1415 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_DLLP); in snd_cs4281_chip_init()
1417 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_SWCE | BA0_CLKCR1_DLLP); in snd_cs4281_chip_init()
1428 if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY) in snd_cs4281_chip_init()
1931 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); in cs4281_suspend()
1933 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK); in cs4281_suspend()
1950 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in cs4281_suspend()
1955 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); in cs4281_suspend()
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/linux-6.1.9/sound/pci/cs46xx/
Dcs46xx_lib.c619 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1); in snd_cs46xx_clear_serial_FIFOs()
621 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp | CLKCR1_SWCE); in snd_cs46xx_clear_serial_FIFOs()
645 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_clear_serial_FIFOs()
663 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_clear_serial_FIFOs()
2883 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs46xx_hw_stop()
2889 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1) & ~CLKCR1_SWCE; in snd_cs46xx_hw_stop()
2890 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_hw_stop()
2940 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs46xx_chip_init()
3006 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP); in snd_cs46xx_chip_init()
3016 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP | CLKCR1_SWCE); in snd_cs46xx_chip_init()
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Dcs46xx.h52 #define BA0_CLKCR1 0x00000400 macro